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Texas Instruments DLP3021LEQ1EVM User Manual Download Page 13

Table 2-2. LED PWM Drive Current Conversion Reference

PWM LEVEL (10-bit)

DRIVER CURRENT (mA)

0

≈ 0

(1)

128

142

256

284

384

426

450

500

512

568

640

710

768

852

896

995

1024

1137

(1)

 = Some current will continue to flow through the LED with a PWM level of 0 and light output may still be visible. To fully remove LED 

current, the DMD controller must be set to disable the PWM outputs.

Note

The RGB LEDs included with the DLP3021LEQ1EVM have maximum continuous forward current 
ratings of 0.5 A, and maximum forward current pulsed ratings of up to 1 A.

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DLPU106A – MARCH 2021 – REVISED OCTOBER 2021

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DLP3021LEQ1EVM Evaluation Module

13

Copyright © 2021 Texas Instruments Incorporated

Summary of Contents for DLP3021LEQ1EVM

Page 1: ...luding the DLP3021 Q1 DMD the FPGA based DMD controller and the TPS65100 PMIC to provide an efficient system for evaluation of dynamic ground projection technology When combined with a computer for GU...

Page 2: ...G2553 Q1 Code Composer Example Project for DGP EVM 26 List of Tables Table 1 1 DLP3021LEQ1 EVM Operating Mode Switch Positions 6 Table 1 2 Light Engine Performance Specifications 7 Table 1 3 DLP3021LE...

Page 3: ...duction design and is intended for evaluation only 1 2 What is in the DLP3021 Q1 Light Engine EVM The DLP3021 Q1 Light Engine EVM consists of three subsystems and two boards DLP3021LEQ1EVM board Forma...

Page 4: ...he assembled DLP3021LEQ1EVM Unit Figure 1 2 DLP3021LEQ1EVM Unit DLP3021 Q1 Electronics EVM Overview www ti com 4 DLP3021LEQ1EVM Evaluation Module DLPU106A MARCH 2021 REVISED OCTOBER 2021 Submit Docume...

Page 5: ...ration A DIP two position switch at S1 on the DLP3021L1Q1EVM allows the user to physically set the operating mode of the formatter subsystem The SPI Adapter board also has two physical switches S1 and...

Page 6: ...cable The light engine will be disabled so that no content is displayed while the EVM is in this mode See Section 4 1 7 for details on Flash Programming Undefined This mode is unsupported by the EVM...

Page 7: ...igh Brightness2 286 Field of View FOV Horizontal Vertical 18 3 10 4 Degrees 1 LED PWM 1023 duty cycles R34 G40 8 B25 2 2 LED PWM 1023 duty cycles R24 9 G62 4 B12 7 1 2 4 Cables The DLP3021LEQ1EVM kit...

Page 8: ...driver Green Osram LCG H9RM LXMX 1 Red and Blue Osram LE BR Q7WM TGTI 24 JXJZ 23 3 Some components are only rated to 85 C 1 3 2 Component Temperature Ratings The board and most of the board components...

Page 9: ...a high speed video interface to the module which improves compatibility with typical vehicle infrastructures It also decreases overall system size and cost by removing graphics generation and interfa...

Page 10: ...wn in Figure 2 2 Figure 2 1 Cable Connections Table 2 1 FTDI C232HM MPSSE Cable to SPI Adapter Board Connections FTDI Wire Signal Pin FTDI Wire Color SPI Adapter Board FTDI Header Pin TCK 2 Orange J5...

Page 11: ...V terminal 2 Set the operation mode switches to the Local Host Control operating mode as defined in Section 1 2 1 The EVM is already flash programmed with TI demo image video content when shipped for...

Page 12: ...st pattern WriteVideoStartAddress2 0x20A98C Race Car WriteVideoConfiguration2 220 0 Configure and run video control VideoControl VideoControl VideoControl Play True VideoControl Stop False VideoContro...

Page 13: ...t output may still be visible To fully remove LED current the DMD controller must be set to disable the PWM outputs Note The RGB LEDs included with the DLP3021LEQ1EVM have maximum continuous forward c...

Page 14: ...ght Engine EVM These heat sinks have been designed to operate the DLP3021 Q1 DMD and LEDs within their data sheet specifications Optics and Mechanics www ti com 14 DLP3021LEQ1EVM Evaluation Module DLP...

Page 15: ...LP3021 Q1 Dynamic Ground Projection System Design DLPA086 report 4 1 1 Default Register Configuration This page determines the default start up conditions of select DMD controller registers Certain re...

Page 16: ...rate is 25 Hz Ideally the duty cycle of the three color red green and blue would be split equally at 33 each however a larger green duty cycle is recommended to achieve a higher brightness output Figu...

Page 17: ...dgm Photo More bits allocated to low and medium light levels Recommended for content where high brightness is less of a priority Figure 4 4 DLP Composer Degamma Curves Gamma correction is a method of...

Page 18: ...ice However content duration can be increased by optimizing content and setting the correct illumination RGB or single color to match the type of content being displayed The video content must be in M...

Page 19: ...ways located at address 0x0 and is always a fixed size of 0x838DC bytes This size is derived from the Xilinx XA7S15 specification for maximum configuration length See the Xilinx UG470 https www xilinx...

Page 20: ...e of Video Block Variable Count Number of Videos Variable Video 0 Address Variable Video 0 Frame Rate Video 0 Frame Count Variable Video 1 Address Variable Video 1 Frame Rate Video 1 Frame Rate Variab...

Page 21: ...Flash Programming operating mode 3 Connect the FTDI cable interface to the SPI Adapter Board and PC 4 Power on the EVM Figure 4 8 shows the LED status of the EVM when in the Flash Programming operati...

Page 22: ...write registers enable video playback change videos read DMD temperature via the TMP411 or adjust current levels to the LEDs To change the DLP Control Program window and pages for DLP3021LEQ1EVM supp...

Page 23: ...pting terminal uses the Python programming language For example the Python script can be used to cycle through all the image video content in a loop for demo purposes Figure 4 11 DLP Control Program S...

Page 24: ...ut parameter details Figure 4 12 DLP Control Program Scripting Reference 4 2 3 Registers The Registers page allows users to perform individual read writes of the block register or bit fields of the FP...

Page 25: ...gins loading bit planes to the DMD and sequencing the LED enables for each bit plane loaded Alternatively a microcontroller such as the MSP430G2553 Q1 on the EVM can issue commands to the FPGA via SPI...

Page 26: ...le 1 2 7 Changed Full On Full Off Contrast from measured at center of image to average in Table 1 2 7 Changed Field of View from 14 7 to 18 3 10 4 in Table 1 2 7 Corrected script from VideoControl Tog...

Page 27: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 28: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 29: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 30: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 31: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 32: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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