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Device Modes and Settings

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6

SLAU773 – May 2018

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Copyright © 2018, Texas Instruments Incorporated

DAC5652AEVM User's Guide

3.2.2.1

Unbuffered Differential Output

To provide unbuffered differential outputs, the EVM must be configured as follows: Remove R3, R13, T1,
and T2; Install R10, R12, R15, R18, R25, R29, J6, and J28.

3.2.2.2

Internal Reference Operation

The full-scale output current is set by applying an external resistor (R

SET

) between the BIASJ pins of the

DAC5652A and ground. The full-scale output current can be adjusted from 20 mA down to 2 mA by
varying R

SET

or changing the externally applied reference voltage. The full-scale output current, I

OUTFS

, is

defined as: I

OUTFS

= 32 × (V

EXTIO

/ R

SET

), where V

EXTIO

is the voltage at pin EXTIO. This voltage is 1.2 V

(typical) when using the internally provided band-gap reference voltage source. On the DAC5652AEVM,
R23 is used to set the output current of channel A and R22 is used to set channel B.

4

Device Modes and Settings

4.1

Sleep Mode

The DAC5652AEVM provides a means of placing the DAC5652A into a power-down mode. This mode is
activated by placing jumper J10 between pins 5 and 6.

4.2

Gain Set

The full-scale output current on the DAC5652A can be set two ways: both channels independently or
simultaneously. For independent gain control, set GSET to a logic low. This mode is activated by placing
jumper J10 between pins 7 and 8. For simultaneous mode, set GSET to a logic high. This mode is
activated by placing jumper J10 between pins 8 and 9.

5

Input Data Mode

The DAC5652AEVM provides a means of placing the DAC5652A into a dual-port data input mode or
interleaved mode. With MODE set to a logic high (JP10 set to 2 and 3), the device operates in dual-port
mode. With MODE set to a logic low (JP10 set to 1 and 2), the device operates in interleave mode.

6

Quick-Start Procedure

1. Connect EVM to TSW1400 board through the CMOS connectors

2. Apply 3.3-V power to J11 and J13; connect ground to J12, J14

3. Setup the clock signals through the HP8133A

Inject 100 MHz to the external input

Set channel 1 and 2 with

3.3-V amplitude

1.65-V offset

Divide by 1

0-ps delay

Connect channel 1 output to CMOS clock input (J7) of the TSW1400

Connect channel 2 output to J3 on the DAC5652AEVM

4. Connect DAC output J1 to the spectrum analyzer

5. Setup the TSW1400. Launch the HSDCpro software and connect the TSW1400EVM to the PC.

Click the DAC tab. Set sample rate to 100 MSPS (that is, match the clock rate)

Select the CMOS .ini file using the dropdown button on upper left corner of the GUI

Select Offset Bin

On the lower left corner of the HSDCpro GUI under I/Q Mutlitone Generator enter 1 for number of
tones and tone center as 10M.

Summary of Contents for DAC5652AEVM

Page 1: ...ation and use of the DAC5652A evaluation module EVM This EVM is designed to evaluate the performance of the DAC5652A dual 10 bit 275 MSPS digital to analog converter DAC in a variety of configurations Throughout this document the terms evaluation board evaluation module and EVM are synonymous with the DAC5652AEVM This document includes a schematic printed circuit board PCB layouts and a complete b...

Page 2: ...ncorporated DAC5652AEVM User s Guide 1 Introduction 3 2 Power Requirements 4 3 Schematic Diagram 4 4 Device Modes and Settings 6 5 Input Data Mode 6 6 Quick Start Procedure 6 List of Figures 1 DAC5652AEVM Setup Diagram 3 List of Tables 1 Input Connector J9 5 2 Transformer Output Configuration 5 ...

Page 3: ...edance ratio transformer or single ended referred to GND Power connections to the EVM are via banana jack sockets Separate sockets are provided for the analog and digital supplies In addition to the internal band gap reference provided by the DAC5652A device options are provided on the EVM to allow external reference to be provided to the DAC 1 1 Required Hardware and Software The following hardwa...

Page 4: ... is required to be 3 3 VDC at banana jack J11 with the return going to J12 This supply is the analog supply for the DAC5652A The second 3 3 VB is required to be 3 3 VDC at banana jack J13 with the return to J14 This supply is the digital 3 3 V supply for the DAC5652A 2 1 External Reference Operation The internal reference can be disabled by simply applying an external reference voltage into the EX...

Page 5: ... DAC B data bit 3 22 Ground 68 Ground 23 DAC A data bit 2 69 DAC B data bit 2 24 Ground 70 Ground 25 DAC A data bit 1 71 DAC B data bit 1 26 Ground 72 Ground 27 DAC A data bit 0 LSB 73 DAC B data bit 0 LSB 28 Ground 74 Ground 3 2 1 Output Signal The DAC5652AEVM can be configured to drive a doubly terminated 50 Ω cable or provide unbuffered differential outputs 3 2 2 Transformer Coupled Signal Outp...

Page 6: ...th channels independently or simultaneously For independent gain control set GSET to a logic low This mode is activated by placing jumper J10 between pins 7 and 8 For simultaneous mode set GSET to a logic high This mode is activated by placing jumper J10 between pins 8 and 9 5 Input Data Mode The DAC5652AEVM provides a means of placing the DAC5652A into a dual port data input mode or interleaved m...

Page 7: ...ments Incorporated DAC5652AEVM User s Guide Set the number of samples to 65536 and select real for tone selection Click the Create Tones button Click Send to send the tone to the DAC 6 Verify the output signal at J1 and J2 7 Adjust the channel 1 output delay on the HP8133A if needed to eliminate timing errors ...

Page 8: ...y set forth above or credit User s account for such EVM TI s liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warr...

Page 9: ...the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la réglementation d Industrie Canada le présent émetteur radio peut fo...

Page 10: ...ed loads Any loads applied outside of the specified output range may also result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Please consult the EVM user guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even ...

Page 11: ...COST OF REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE 12 MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED 8 2 Specif...

Page 12: ... TI Resource NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN including but not limited to any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI product...

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