Texas Instruments DAC348 Series User Manual Download Page 2

Introduction

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DAC34SH84

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19

List of Tables

1

DAC348xEVM Jumpers: (make sure the following jumpers are at their default setting)

.........................

12

1

Introduction

1.1

Overview

This document is intended to serve as a basic user

s guide for the DAC3484/2 EVM Revision F, and

DAC34H84/SH84 EVM revision C and above.

The Texas Instruments DAC348x evaluation module (EVM) is a family of circuit boards that allows
designers to evaluate the performance of Texas Instruments' DAC348x family of digital-to-analog
converters (DAC). The 16-bit, ultra low power family of DACs has either 16-bit wide or 32-bit wide DDR
LVDS data input, integrated 2x/4x/8x/16x interpolation filters, 32-bit NCO, on-chip PLL, and exceptional
linearity at high IFs. The EVM provides a flexible environment to test the DAC348x under a variety of
clock, data input, and IF output conditions.

DAC3484

DAC3482

DAC34H84

DAC34SH84

Output Channel

4

2

4

4

EVM Part No.

DAC348x Rev. F

DAC348x Rev. F

DAC34H84 Rev. C

DAC34H84 Rev. C

Maximum DAC Rate

1.25GSPS

1.25GSPS

1.25GSPS

1.5GSPS

Digital Interface

16-bit LVDS Interface

16-bit LVDS Interface

32-bit LVDS Interface

32-bit LVDS Interface

Maximum Data Rate per Channel

312.5MSPS

625MSPS

625MSPS

750MSPS

Maximum LVDS Bus Toggle Rate

1.25GSPS

1.25GSPS

1.25GSPS

1.5GSPS

TSW1400/TSW3100

Pattern Generator Support

TSW1400/TSW3100

TSW1400/TSW3100

TSW1400/TSW3100

with limited data rate
support

For ease of use as a complete IF transmit solution, the DAC348xEVM includes the Texas Instruments
CDCE62005 clock generator/jitter cleaner for clocking the DAC348x. Besides providing a high-quality, low
jitter DAC sampling clock to the DAC348x, the CDCE62005 also provides FPGA clocks to the
TSW1400EVM (or TSW3100EVM) as FPGA reference clocks.

The EVM can be used along with Texas Instruments TSW1400 or TSW3100 with limited data rate support
(up to 1.25GSPS LVDS Bus rate) to perform a wide varieties of test and measurements. The TSW1400
generates the test patterns that are fed to the DAC348x through a maximum 1.5 GSPS LVDS Bus port.
These EVM boards are also compatible with Altera

®

and Xilinx

®

FPGA development platforms for rapid

evaluation and prototyping. The on-board HSMC connector input allows direct connection to the HSMC
compatible Altera development platforms, and the externally attached FMC-DAC-Adapter board available
from TI enables the connection of the EVM to the Xilinx development platforms with FMC headers.

For evaluation of complete RF transmit solution, see the TSW308x EVM. The EVM integrates the
DAC348x, TRF3705, and LMK04800 devices into one RF transmitter system.

See the TSW308x EVM web folders at:

http://www.ti.com/tool/tsw3085evm
http://www.ti.com/tool/tsw3084evm
http://www.ti.com/tool/tsw30h84evm
http://www.ti.com/tool/tsw30sh84evm

1.2

EVM Block Diagram

Figure 1

shows the configuration of the EVM with the TSW1400 or TSW3100 used for pattern generation.

2

DAC348x EVM

SLAU432

February 2012

Submit Documentation Feedback

Copyright

©

2012, Texas Instruments Incorporated

Summary of Contents for DAC348 Series

Page 1: ...List of Figures 1 DAC348x EVM Block Diagram 3 2 Input Control Option 4 3 PLL Configuration 6 4 Digital Block Options 7 5 Output control Options 8 6 CDCE62005 Tab Configured for 4x Interpolation 9 7 US...

Page 2: ...ase of use as a complete IF transmit solution the DAC348xEVM includes the Texas Instruments CDCE62005 clock generator jitter cleaner for clocking the DAC348x Besides providing a high quality low jitte...

Page 3: ...t pin out location YA Y1 for DAC3484 and DAC3482 EVMs Y2 for DAC34H84 and DAC34SH84 EVMs YB Y2 for DAC3484 and DAC3482 EVMs Y1 for DAC34H84 and DAC34SH84 EVMs 5th Order LPF 5th Order LPF 5th Order LPF...

Page 4: ...used to configure the DAC348x and the last for the CDCE62005 2 2 1 Input Control Options Figure 2 Input Control Option FIFO allows the configuration of the FIFO and FIFO synchronization sync sources...

Page 5: ...the Single Sync Source Mode in the relevant DAC348x data sheet for details For multiple device synchronization select the OSTR signal as the FIFO output synchronization source If the DAC is configure...

Page 6: ...4GHz 5 For the DAC34SH84 Set the prescaler such that the FDAC x prescaler is within 2 7GHz and 3 3GHz 6 Set VCO Bias Tune to 1 7 Charge Pump setting a If stability P x M is less than 120 then set to...

Page 7: ...y for each I Q channel This is useful for wideband sideband suppression Note This feature is not available for the DAC34SH84 Offset Adjustment allows adjustment of dc offset to minimize the LO feed th...

Page 8: ...r sync must be enabled with OSTR set as sync source Refer to the datasheet for OSTR period requirement SYNC sync from the external SYNC signal SIF SYNC sync from SIF Sync Uncheck and check the SIF Syn...

Page 9: ...ion 8 See the DAC348x data sheet for more details The whole OSTR clock equation needs to take account of both the Y1 CDCE62005 clock divider ratio and the additional CDCP1803 divide by 2 clock divider...

Page 10: ...n File Released folder and respective sub folders for the EVM Double click on the desired register file Click on Send All to ensure all of the values are loaded properly Save Regs Saves the register c...

Page 11: ...um LVDS bus rate of 1 5 GSPS and this allows evaluation of the DAC348x with maximum 750 MSPS of input data rate per channel See the TSW1400 user s guide SLWU079 for more detailed explanation of the TS...

Page 12: ...P13 short SPI connection break point This allows routing of SPI connection to external system if troubleshooting is needed JP10 1 2 6V Input Select Default is 6V at J18 JP11 open For DAC34H84 SH84 EVM...

Page 13: ...g device in the Select DAC menu Figure 10 Select DAC348x Devices in the High Speed Converter Pro GUI Program 2 When prompted Load DAC Firmware select YES Figure 11 Load DAC Firmware Prompt 3 Click on...

Page 14: ...Hanning for Window 7 In the DAC Selection panel on the left side of the GUI click on Send to load the data into memory 8 Toggle the SIF SYNC button of the DAC348x EVM GUI to synchronize the appropriat...

Page 15: ...an 25 5 MHz 2 55 MHz 110 100 90 80 70 60 50 40 30 20 Tx Cha nne l W C DMA 3G PP FWD Ban dwi dth 3 84 MHz P o w e r 7 5 2 d B m Adj ace nt Cha nne l Ban dwi dth 3 84 MHz L o w e r 7 8 9 5 d B Spa cin g...

Page 16: ...that the TSW3100 software is installed and functioning properly The TSW30SH84 needs TSW3100 operating software version 2 5 or higher with TSW3100 board Rev D or higher The DAC348xEVM sends the FPGA r...

Page 17: ...p Procedure See the DAC348x Example Setup Procedure section 4 5 TSW3100 Example Setup Procedure Reference the TSW3100 User s Guide SLWU079 for more detailed explanations of the TSW3100 set up and oper...

Page 18: ...ify the spectrum using the Spectrum Analyzer at the four IF outputs of the DAC348x EVM J7 J6 J3 and J2 For the DAC3482 EVM the IF outputs are at the J6 and J3 SMA connector The expect results are show...

Page 19: ...cedure with TSW3100 Figure 18 TSW3100 CommSignalPattern WCDMA Programming GUI for DAC3482 DAC34H84 and DAC34SH84 19 SLAU432 February 2012 DAC348x EVM Submit Documentation Feedback Copyright 2012 Texas...

Page 20: ...er DAC DAC34SH84 SLAS808 Five Ten Output Clock Generator Jitter Cleaner With Integrated Dual VCO CDCE62005 SCAS862 5 2 Related Tools From Texas Instruments TSW1400 High Speed Data Capture Pattern Gene...

Page 21: ...ncy energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio fr...

Page 22: ...ential radio interference to other users the antenna type and its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful commu...

Page 23: ...oduct only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product or 3 Use of this product only after you obtained the Technical Regulation...

Page 24: ...property damage personal injury or death If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and in...

Page 25: ...or use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have...

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