Texas Instruments Concerto F28M35 Series, Technical Reference Manual

Page: 424 / 1655

C28 General-Purpose Input/Output (GPIO)
www.ti.com
424 SPRUH22I – April 2012 – Revised November 2019
Submit Documentation Feedback
Copyright © 2012–2019, Texas Instruments Incorporated
General-Purpose Input/Output (GPIO)
Figure 4-77. GPIO Low Power Mode Wakeup Select 1 (GPIOLPMSEL1) Register
31 30 29 28 27 26 25 24
GPIO31 GPIO30 GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
23 22 21 20 19 18 17 16
GPIO23 GPIO22 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 10 9 8
GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
(1)
This register is EALLOW protected.
Table 4-96. GPIO Low Power Mode Wakeup Select 1 (GPIOLPMSEL1) Register Field Descriptions
Bits Field Value Description
(1)
31-0 GPIO31 - GPIO0 Low Power Mode Wakeup Selection 1. Each bit in this register corresponds to one GPIO
port A pin (GPIO0 - GPIO31).
0 If the bit is cleared, the signal on the corresponding pin will have no effect on the HALT and
STANDBY low power modes.
1 If the respective bit is set to 1, the signal on the corresponding pin is able to wake the
device from both HALT and STANDBY low power modes.
4.2.7.37 GPIO Low Power Mode Wakeup Select 2 (GPIOLPMSEL2) Register
The GPIO Low Power Mode Wakeup Select 2 (GPIOLPMSEL2) register is shown and described in the
figure and table below.
Figure 4-78. GPIO Low Power Mode Wakeup Select 2 (GPIOLPMSEL2) Register
31 30 29 28 27 26 25 24
GPIO63 GPIO62 GPIO61 GPIO60 GPIO59 GPIO58 GPIO57 GPIO56
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
23 22 21 20 19 18 17 16
GPIO55 GPIO54 GPIO53 GPIO52 GPIO51 GPIO50 GPIO49 GPIO48
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 10 9 8
GPIO47 GPIO46 GPIO45 GPIO44 GPIO43 GPIO42 GPIO41 GPIO40
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
GPIO39 GPIO38 GPIO37 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
(1)
This register is EALLOW protected.
Table 4-97. GPIO Low Power Mode Wakeup Select 2 (GPIOLPMSEL2) Register Field Descriptions
Bits Field Value Description
(1)
31-0 GPIO63 - GPIO32 Low Power Mode Wakeup Selection 1. Each bit in this register corresponds to one GPIO
port B pin (GPIO32 - GPIO63) .
0 If the bit is cleared, the signal on the corresponding pin will have no effect on the HALT and
STANDBY low power modes.
1 If the respective bit is set to 1, the signal on the corresponding pin is able to wake the
device from both HALT and STANDBY low power modes.