-25.0
-20.0
-15.0
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
0
1
2
3
4
5
6
7
8
9 0A 0B 0C 0D 0E 0F 50 60 70 80 90 A0 B0 C0 D0 E0 F0 FF
PA_POWER [hex]
C
u
rr
e
n
t
[m
A
]
/
O
u
tp
u
t
p
o
w
e
r
[d
B
m
]
Current Consumption
Output Power
-25.0
-20.0
-15.0
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
0
1
2
3
4
5
6
7
8
9 0A 0B 0C 0D 0E 0F 50 60 70 80 90 A0 B0 C0 D0 E0 F0 FF
PA_POWER [hex]
C
u
rr
e
n
t [
m
A
] /
O
u
tp
u
t p
o
w
e
r
[d
B
m
]
Current Consumption
Output Power
SWRS046H – NOVEMBER 2006 – REVISED MARCH 2015
Figure 5-20. Typical Output Power and Current Consumption, 433 MHz
Figure 5-21. Typical Output Power and Current Consumption, 433 MHz
5.10.3 TX Data Latency
The transmitter will add a delay due to the synchronization of the data with DCLK and further clocking into
the modulator. The user should therefore add a delay equivalent to at least 2 bits after the data payload
has been transmitted before switching off the PA (that is, before stopping the transmission).
Copyright © 2006–2015, Texas Instruments Incorporated
Detailed Description
41
Product Folder Links: