7 Pin Configuration and Functions
GND
RESET
INT
MR
IPRETE
RM
ISET
BAT
BAT
TS
ILIM
PG
VINLS
VINLS
PGND
SW
PMID
A
B
C
D
1
2
3
4
SDA
LSCTRL
CD
SCL
E
IN
LS/LDO
SYS
PMID
GND
5
Figure 7-1. YFP Package 25-Pin DSBGA Top View
Table 7-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
IN
A2
I
DC Input Power Supply. IN is connected to the external DC supply. Bypass IN to GND with
at least 1 µF of capacitance using a ceramic capacitor.
PMID
A3, B3
I/O
High Side Bypass Connection. Connect at least 3µF of ceramic capacitance with DC bias
derating from PMID to GND as close to the PMID and GND pins as possible. When entering
Ship Mode, PMID is discharged by a 20-kΩ internal discharge resistor.
GND
A1, D5
Ground connection. Connect to the ground plane of the circuit.
PGND
A5
Power ground connection. Connect to the ground plane of the circuit. Connect the output
filter cap from the buck converter to this ground as shown in the layout example.
CD
E2
I
Chip Disable. Drive CD low to place the part in High-Z mode with battery only present, or
enable charging when V
IN
is valid. Drive CD high for Active Battery mode when battery only
is present, and disable charge when V
IN
is present. CD is pulled low internally with 900 kΩ.
SDA
E4
I/O
I
2
C Interface Data. Connect SDA to the logic rail through a 10-kΩ resistor.
SCL
E5
I
I
2
C Interface Clock. Connect SCL to the logic rail through a 10-kΩ resistor.
ILIM
C2
I
Adjustable Input Current Limit Programming. Connect a resistor from ILIM to GND to
program the input current limit. The input current includes the system load and the battery
charge current. Connect ILIM to GND to set the input current limit to the internal default
threshold. ILIM can also be updated through I
2
C.
LSCTRL
E3
I
Load Switch and LDO Control Input. Pull high to enable the LS/LDO output, pull low to
disable the LS/LDO output.
ISET
C1
I
Fast-Charge Current Programming Input. Connect a resistor from ISET to GND to program
the fast-charge current level. Connect a resistor from ISET to GND to set the charge current
to the internal default. ISET can also be updated through I
2
C. While charging, the voltage
at ISET reflects the actual charging current and can be used to monitor charge current if an
ISET resistor is present and the device is not in host mode.
SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021
4
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