Texas Instruments BQ25120F3A, Manual

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9.6.2 Faults and Faults Mask Register
Memory location 0x01h, Reset State: xxxx 0000 (BQ25120F3A)
Figure 9-12. Faults and Faults Mask Register
7 (MSB) 6 5 4 3 2 1 0 (LSB)
x x x x 0 0 0 0
R R R R R/W R/W R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 9-13. Faults and Faults Mask Register
Bit Field Type Reset Description
B7 (MSB) VIN_OV R x 1 – V
IN
overvoltage fault. VIN_OV continues to show fault after
an I
2
C read as long as OV exists
B6 VIN_UV R x 1 – V
IN
undervoltage fault. VIN_UV is set when the input falls
below V
SLP
. VIN_UV fault shows only one time. Once read,
VIN_UV clears until another UVLO event occurs.
B5 BAT_UVLO R x 1 – BAT_UVLO fault. BAT_UVLO continues to show fault after
an I
2
C read as long as BAT_UVLO conditions exist.
B4 BAT_OCP R x 1 – BAT_OCP fault. BAT_OCP is cleared after I
2
C read.
B3 VIN_OV_M R/W 0 1 – Mask V
IN
overvoltage fault
B2 VIN_UV_M R/W 0 1 – Mask V
IN
undervoltage fault
B1 BAT_UVLO_M R/W 0 1 – Mask BAT UVLO fault
B0 (LSB) BAT_OCP_M R/W 0 1 – Mask BAT_OCP fault
BQ25120F3A
SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021
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