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User

'

s Guide

SLUU321C

June 2008

Revised June 2011

bq24150/150A/151/151A/152 YFF EVM (HPA256)

Contents

1

Introduction

..................................................................................................................

1

1.1

EVM Features

......................................................................................................

1

1.2

General Description

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2

1.3

I/O Description

......................................................................................................

2

1.4

Control and Key Parameters Setting

............................................................................

2

1.5

Recommended Operating Conditions

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2

2

Test Summary

...............................................................................................................

3

2.1

Definitions

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3

2.2

Equipment

...........................................................................................................

3

2.3

Equipment Setup

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4

2.4

Procedure

...........................................................................................................

5

3

PCB Layout Guideline

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6

4

Bill of Materials, Board Layout and Schematics

........................................................................

8

4.1

Bill of Materials

.....................................................................................................

8

4.2

Board Layout

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10

4.3

Schematic

.........................................................................................................

12

List of Figures

1

Connections of the HPA172 Kit

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4

2

Original Test Setup for HPA256 (bq2415x EVM)

.......................................................................

5

3

The Main Window of the bq2415x Evaluation Software (For bq24150/150A/151/151A/152)

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5

4

Test setup for HPA256

....................................................................................................

6

5

Top Layer

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10

6

Bottom Layer

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10

7

Top Assembly

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11

8

Top Silk

.....................................................................................................................

11

List of Tables

1

Factory Jumper Settings

...................................................................................................

4

1

Introduction

1.1

EVM Features

Evaluation Module For BQ24150/150A/151/151A/152 in chipscale (YFF) package

High Efficiency Fully Integrated NMOS-NMOS Synchronous Buck Charger With 3MHz Frequency

Integrated Power FETs for Up To 1.25-A Charge Rate

Programmable Battery Voltage, Charge Current, and Input Current via I

2

C Interface

Input Operating Range 4 V

6 V

Boost Mode Operation for USB OTG

LED Indication for Status Signals

1

SLUU321C

June 2008

Revised June 2011

bq24150/150A/151/151A/152 YFF EVM (HPA256)

Submit Documentation Feedback

Copyright

©

2008

2011, Texas Instruments Incorporated

Summary of Contents for BQ24150

Page 1: ...in Window of the bq2415x Evaluation Software For bq24150 150A 151 151A 152 5 4 Test setup for HPA256 6 5 Top Layer 10 6 Bottom Layer 10 7 Top Assembly 11 8 Top Silk 11 List of Tables 1 Factory Jumper...

Page 2: ...o CSOUT pin J3 SCL I2 C clock connect to SCL pin J3 SDA I2 C data connect to SDA pin J3 DC AC adapter or USB negative output J4 STAT Status output can be connected to STAT pin by JMP1 set to EXT 2 3 J...

Page 3: ...ecified parameters A B If measured values are not within specified limits the unit under test has failed Observe A B Observe if A B occur If they do not occur the unit under test has failed Assembly d...

Page 4: ...ected across J2 BAT BAT Turn on the Load 2 Use the constant voltage mode Set the output voltage to 2 5V E Turn off Load 2 F Connect J5 to HPA172 kit by 10 pin ribbon cable Connect the USB port of the...

Page 5: ...n window of the software is shown in Figure 3 Figure 3 The Main Window of the bq2415x Evaluation Software For bq24150 150A 151 151A 152 2 4 Procedure 2 4 1 Charge Voltage and Current Regulation 1 Make...

Page 6: ...multimeter to J1 DC DC Make sure a voltage meter is connected across J1 DC DC The setup is now like Figure 4 for HPA256 Figure 4 Test setup for HPA256 3 Turn on PS 1 output 4 Software setup Change Op...

Page 7: ...design approach is typically used to keep circuit block currents isolated high power low power small signal which reduces noise coupling and ground bounce issues A single ground plane for this design...

Page 8: ...1 1 1 J1 ED1514 2DS Terminal Block 2 pin 6 A 0 27 x 0 25 inch ED1514 2DS OST 3 5mm 3 3 3 3 3 J2 J3 J4 ED1515 3DS Terminal Block 3 pin 6 A 0 41 x 0 25 inch ED1515 3DS OST 3 5mm 1 1 1 1 1 J5 2510 6002U...

Page 9: ...1 0 0 0 U1 BQ24151YFF IC Battery Charger for WCSP BQ24151YFF TI Single Cell Li Ion and Li Polymer Battery 0 0 1 0 0 U1 BQ24152YFF IC Battery Charger for WCSP BQ24152YFF TI Single Cell Li Ion and Li Po...

Page 10: ...ematics www ti com 4 2 Board Layout Figure 5 Top Layer Figure 6 Bottom Layer 10 bq24150 150A 151 151A 152 YFF EVM HPA256 SLUU321C June 2008 Revised June 2011 Submit Documentation Feedback Copyright 20...

Page 11: ...Board Layout and Schematics Figure 7 Top Assembly Figure 8 Top Silk 11 SLUU321C June 2008 Revised June 2011 bq24150 150A 151 151A 152 YFF EVM HPA256 Submit Documentation Feedback Copyright 2008 2011 T...

Page 12: ...s Board Layout and Schematics www ti com 4 3 Schematic 12 bq24150 150A 151 151A 152 YFF EVM HPA256 SLUU321C June 2008 Revised June 2011 Submit Documentation Feedback Copyright 2008 2011 Texas Instrume...

Page 13: ...duct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application enginee...

Page 14: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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