Texas Instruments AFE5807EVM, User Manual, Page: 21 / 36

PGA output to CW input (CH7)
CW_IP_OUTP / CW_IP_OUTM
PGA output to CW input (CH8)
CW_IP_OUTP / CW_IP_OUTM
JP9
JP10
J9
J10
J14
J12
J13
JX1
JP52
JP53
JP57
JP56
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Board Configuration
12.2 CW Mode, ADC Clock
Figure 12. AFE5807/08EVM Jumper Locations
Table 3. CW Mode, ADC Clock
Clock Reference
Description
Type Designator
J9/J10 External CW Mode clock. The default is using onboard oscillator.
CW output for I-channel via an external operational amplifier. The EVM has converted the
differential signal CW_IP_OUTP and CW_IP_OUTM into this single-ended output through an
J12
operational amplifier.
JP52/JP53
To observe CW_IP_OUTP and CW_IP_OUTM before the external operational amplifier, the user
can probe JP52 and JP53.
CW Mode
CW output for V-channel via an external operational amplifier. The EVM has converted the
differential signal CW_VP_OUTP and CW_VP_OUTM into this single-ended output through an
J13
operational amplifier.
JP56/JP57
To observe CW_VP_OUTP and CW_VP_OUTM before the external operational amplifier, the user
can probe JP56 and JP57.
JX1 This connector allows the user to see signals of J12 and J13 simultaneously.
JP9 selects on_board_ADC CMOS clock or external clock from J14. Default setup in Figure 4 uses
onboard CMOS clock. Set it to the other side to use the external clock source.
JP9/JP10
ADC
Short to power up onboard CMOS clock.
J14 External ADC clock Input.
21 SLOU309 – December 2010 AFE5807/08EVM (Rev D) Evaluation Module
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