AVDD (used as
Reference)
OPA_AVDD
V
IN+
AINP
AINM
GND
AVDD
Device
OPA_AVSS
+
R
C
+
±
Anti-Aliasing
Filter
Buffer
Signal
Source
ADC
Overview
1
Overview
The ADS7040EVM-PDK is a platform for evaluation of the ADS7040 ADC. The evaluation kit combines
the ADS7040EVM board with a Simple Capture Card controller board. This controller card consists of a TI
Sitara embedded microcontroller (AM3352) and a field-programmable gate array (FPGA). It provides an
interface from the EVM to the computer through a universal serial bus (USB) port. The included software
communicates with the Simple Capture Card, and the controller card provides the power and digital
signals used to communicate with the ADS7040EVM board. These demonstration kits include the
ADS7040EVM board, the Simple Capture Card, a microSD memory card, and an A-to-micro-B USB cable.
1.1
ADS7040EVM Features
•
Contains support circuitry as a design example to match ADC performance
•
3.3-V slave serial peripheral interface (SPI)
•
Onboard 5-V analog supply
•
Onboard
(56-MHz bandwidth, Rail-to-Rail Out) ADC input drivers
1.2
ADS7040EVM-PDK Features
•
USB port for computer interface
•
Easy-to-use evaluation software for Microsoft
®
Windows
®
XP, Windows 7, and Windows 8 operating
systems
•
Built-in analysis tools including scope, FFT, and histogram displays
•
Data collection to text files supported
2
EVM Analog Interface
The ADS7040 is an extremely low-power, extremely small size ADC that supports single-channel ended
analog inputs. The ADS7040EVM uses an OPA835 amplifier to drive the inputs of the ADC. The
ADS7040EVM is designed for easy interfacing to multiple analog sources. SMA connector J3 (please refer
to the schematics in
) allows the EVM to have input signals connected through a coaxial cable.
In addition, header connector P2 provides a convenient way to connect input signals. All analog inputs are
buffered by the OPA835 amplifier in order to properly drive the ADS7040 ADC inputs.
Figure 1. ADS7040EVM Analog Input Connections
lists the analog interface connectors available. Since the AVDD supply functions as the reference
for the ADC, the voltage provided on the J3 or P2 connector can vary from 0 V to AVDD. Connecting an
input signal greater than AVDD would cause the ADC output codes to saturate.
Microsoft, Windows are registered trademarks of Microsoft Corporation.
All other trademarks are the property of their respective owners.
3
SBAU240 – November 2014
ADS7040EVM-PDK
Copyright © 2014, Texas Instruments Incorporated
