Texas Instruments ADS1x20EVM User Manual Download Page 6

Using the ADS1220EVM ADCPro Plug-in

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4

Using the ADS1220EVM ADCPro Plug-in

The ADS1220EVM plug-in for ADCPro provides complete control over all settings of the ADS1220. The
plug-in consists of a tabbed interface (see

Figure 2

), with different functions available on different tabs.

The tabs are:

I/O Config

Current & Ref

About

The user can adjust the ADS1220EVM settings when not acquiring data. During acquisition, all controls
are disabled and settings may not be changed. When a setting is changed on the ADS1220EVM plug-in,
the setting immediately updates on the board. Settings on the ADS1220EVM correspond to settings
described in the

ADS1220

product data sheet.

4.1

Top-Level Controls

The ADS1220EVM settings can be adjusted when not acquiring data. During acquisition, all controls are
disabled and settings may not be changed.

The effective data rate of the ADS1220 depends upon the frequency of the clock used. The default
operating mode is the internal clock oscillator of the ADS1220, which is 4.096 MHz. The Data Rate
indicator in the upper right corner of the plug-in interface (see

Figure 2

) is always visible and updates

whenever a setting changes that affects the data rate. The indicated values are representative of the
internal clock frequency of the ADS1220 and the operating clock mode (Normal, Duty-Cycle, or Turbo).
The default operating mode is Normal. The Data Rate is adjusted by making the desired selection from
the drop-down menu.

The Gain indicator in the upper left corner of the plug-in interface (see

Figure 2

) is always visible and

updates whenever a setting changes that affects the gain. The indicated values are representative of the
state of the PGA Bypass. If PGA Bypass is selected on the I/O Config tab (as shown in

Figure 2

), only

gains of 1, 2, and 4 are bypassed from the PGA. All other gain settings require the PGA to be enabled.
When higher gains are selected, the PGA is enabled regardless of the PGA Bypass state. To limit
confusion regarding the state of the PGA, the only possible selections for PGA Bypass is 1, 2, or 4 from
the drop-down menu.

The only way to view output data results is by operating the ADS1220 in continuous conversion mode.
This mode is identified by the Cont Conv button indicator (as shown in

Figure 2

on the bottom left of the

ADS1220EVM plug-in. The button is lit green when in continuous conversion mode, otherwise the
ADS1220 is in single conversion mode in a power-down state. No data can be collected while not in Cont
Conv 
and are only useful for monitoring supply currents to determine power consumption of the ADS1220
while in power-down.

6

ADS1x20EVM

SBAU203 – July 2013

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Copyright © 2013, Texas Instruments Incorporated

Summary of Contents for ADS1x20EVM

Page 1: ...s available through the Texas Instruments web site at www ti com Table 1 EVM Compatible Device Data Sheets Device Literature Number Device Literature Number ADS1120 SBAS535 MSP430F5528 SLAS590 ADS1220...

Page 2: ...ata Sheets 1 2 Default Jumper and Switch Configuration 4 3 Critical Connections 5 4 Jumper and Switch Descriptions 10 5 J4 Primary Analog Interface Pinout 11 6 J1 and J6 Bridge Sensor Connectors 11 7...

Page 3: ...r with JTAG interface Compatible with the TI LaunchPad The ADS1x20EVM includes an interface for serial communication that can be used with ADCPro to quickly evaluate the device This manual covers the...

Page 4: ...s 2 4 AVDD supply connection to 5 V or 3 3 V default to 3 3 V JP7 Short USB power connected to 5 V JP8 Short U5 output connected to 3 3 V 2 2 ADS1220EVM Operation To prepare to evaluate the ADS1220 wi...

Page 5: ...Inputs The analog inputs for the ADS1220EVM are connected to J1 J2 J3 J4 and J6 Channels 1 to 4 and the external reference connect to header J4 3 2 Digital Control The digital control signals can be a...

Page 6: ...quency of the ADS1220 and the operating clock mode Normal Duty Cycle or Turbo The default operating mode is Normal The Data Rate is adjusted by making the desired selection from the drop down menu The...

Page 7: ...output response of the digital filter The default condition is to have No 50 60 Hz Rejection Other options from the drop down menu allow for Simultaneous 50 60 Hz Rejection 50 Hz Rejection Only or 60...

Page 8: ...power savings can be calculated by comparing the total power used while converting as compared to the total power of the power down mode 4 3 Current Ref Tab The Current Ref tab allows various referenc...

Page 9: ...1000uA and 1500uA If both IDACs are routed to the same output the IDAC current available is twice the indicated IDAC Magnitude The IDAC current sources can be routed independently or to the same outpu...

Page 10: ...og supply source Short 3 to 4 bottom AVDD is connected to 3 3 V default Short External oscillator is used as the clock source requires installation JP4 Clock source Open On board or external J8 clock...

Page 11: ...s a standard single row 4 pin header with 0 1 inch pin spacing Both connectors allow for excitation to be connected to the outer pins while the differential signals from the sensor connect to the inne...

Page 12: ...ion to three and four wire RTDs A two wire RTD requires a jumper between J2 1 and J2 2 as well as between J2 3 and J2 4 Three wire RTDs require an additional excitation current 4 Pin 1 is at the top l...

Page 13: ...f the computer An extension cable can also be used instead of the direct connection U7 uses two hardware peripherals to control devices on the ADS1220EVM One peripheral uses SPI to communicate with th...

Page 14: ...pin debugger connections in relation to J10 The information can be used to create an adapter between J10 and the 14 pin debugger cable The J10 footprint is a 2 mm pitch spacing if a socket or header...

Page 15: ...ply 5V 2 Digital power supply 3 3V 1 1 N C N C 5 10 12 14 16 20 Power supply ground AGND DGND 4 1 Pin 1 is bottom side below and to the right of the reference designator Table 11 JDB External Interfac...

Page 16: ...MT Vert 5x2 pin 100mil Samtec TSM 105 01 L DV P spacing 12 1 J6 Header Male 4 pin 100mil spacing Samtec TSW 104 07 L S 13 1 J7 Terminal Block Miniature 2 position On Shore ED555 2DS Technology Inc 14...

Page 17: ...56 I ST 36 1 U5 IC 3 3V LDO Regulator 150mA TI TPS76333DBVR 37 1 U6 IC Supply Voltage Supervisor TI TPS3838L30DBVT 38 1 U7 IC Microcontroller TI MSP430F5528IRGCT 39 1 U8 IC Quad Gate Tri State Buffer...

Page 18: ...5 XOUT 13 P5 4 XIN 12 VBUS 53 VUSB 54 V18 55 P5 2 XT2IN 57 P5 3 XT2OUT 58 TEST SBWTCK 59 AVSS1 14 DVCC1 15 DVSS1 16 VCORE 17 P1 0 TA0CLK ACLK 18 P1 1 TA0 0 19 P1 2 TA0 1 20 P1 3 TA0 2 21 P1 4 TA0 3 22...

Page 19: ...ncy energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio fr...

Page 20: ...na type and its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved...

Page 21: ...roduct only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product or 3 Use of this product only after you obtained the Technical Regulatio...

Page 22: ...erations per the user guidelines Exceeding the specified EVM ratings including but not limited to input and output voltage current power and environmental ranges may cause property damage personal inj...

Page 23: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

Page 24: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments ADS1120EVM...

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