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1
EVM Overview
1.1
Features
2
Introduction
2.1
Analog Interface
2.1.1
Analog Input Signal Conditioning
EVM Overview
•
Full-featured evaluation board for the ADS1610 10-MSPS high-speed 16-bit, single-channel, parallel
interface, delta sigma type analog-to-digital converter.
•
Onboard signal conditioning
•
Onboard reference, with recommended buffer circuitry
•
Input and output digital buffers
•
Basic system-level logic decoding.
The ADS1610 is high-speed, high-resolution delta sigma (
∆Σ
) analog-to-digital converter. It features a data
rate of 10 MSPS and an advanced multistage analog modulator combined with an on-chip digital
decimation filter. The ADS1610 achieves 86 dBFS signal-to-noise ratio (SNR) in a 5-MHz signal
bandwidth. The device offers outstanding performance at these speeds with a total harmonic distortion of
–94 dB. The ADS1610
∆Σ
topology provides key system-level design advantages with respect to antialias
filtering and clock jitter. The design of the antialias filter is simplified because the on-chip digital filter
greatly attenuates out-of-band signals. The ADS1601 filter has a brick wall response with a flat pass band
(
±
0.0002 dB of ripple) followed immediately by a wide stop band (5 MHz to 55 MHz). Clock jitter becomes
especially critical when digitizing high-frequency, large-amplitude signals. The ADS1610 significantly
reduces clock jitter sensitivity by an effective averaging of clock jitter as a result of oversampling the input
signal. Output data is supplied over a parallel interface and easily connects to TMS320 digital signal
processors (DSP). The power dissipation can be adjusted with an external resistor, allowing for reduction
at lower operating speeds. With its outstanding high-speed performance, the ADS1610 is well-suited for
demanding applications in data acquisition, scientific instruments, test and measurement equipment, and
communications.
The ADS1610EVM is a stand-alone, full-featured system that offers data-sheet performance. Additionally,
the EVM conforms to a common electrical and mechanical pinout for digital I/O enabling it to be quickly
adapted to various host platforms.
The analog interface consists of the following subsections:
1. Analog input
2. External reference generation
3. Modulator clock
The ADS1610 measures the differential signal, VIN = (AINP-AINP), against the differential reference,
VREF = (VREFP – VREFN). The analog input signal can be applied to the board through the SMA
connectors J4 and J41. The board arrives with the input circuitry configured for single-ended in, differential
output, as shown in
. It has a 50 -
Ω
termination; therefore, the signal source needs to be able to
provide a 3 -V single-ended signal with this termination. The single-ended analog signal can be applied at
J4.
The onboard input driver is designed using the wide-band, low-distortion, fully differential amplifier
(THS4503) from Texas Instruments. The amplifier is configured for a gain of 2. The THS4503 can directly
accept differential signals or be used to convert a single-ended input signal to a differential one. The
factory-set condition is for a single-ended input converted to fully differential at the output of the THS4503.
The desired output common-mode signal is fed through pin 2 of the THS4503. The required common
mode is 2.5 V. This voltage is generated onboard in the reference voltage generation circuitry.
2
ADS1610EVM
SLAU180A – May 2006 – Revised August 2006