8 Test Pattern
Test patterns are often used to help verify the correct reciept of digital data at the microcontroller or FPGA. A
ramp pattern can be enabled by following these steps:
• Click the yellow button "Analog Inputs and Clk"
• Next to "Test Pattern CHA", click the drop down menu, and select "RAMP CUSTOM". This can be done for
"Test Pattern CHB" as well.
• In the field next to "Custom Pattern",
– For 16 bit ramp mode (ADC3663EVM, ADC3662EVM), "4" must be entered in the "Custom Pattern" field.
• The digital ramp pattern is now enabled on the ADC. The output of the ADC is now an 16 bit, incrementing
ramp pattern.
Figure 8-1. ADC36xxEVM 16-bit Ramp Pattern
• In HSDC Pro, the ramp pattern can now be seen when data is captured. These same steps apply to any data
output mode (Bypass, Real Decimation and Complex Decimation).
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Test Pattern
26
ADC366xEVM Evaluation Module
SBAU366 – JANUARY 2021
Copyright © 2021 Texas Instruments Incorporated
