4.1 Bypass Mode
The following steps show how to configure the ADC3643EVM in Bypass mode.
4.1.1 ADC35XX GUI: Bypass Mode (DDR) Configuration
By default, the ADC3643EVM is preconfigured for 14bit, DDR mode. When using this mode, the only required
step in the ADC35XX GUI is to configure the onboard clock in order to select the desired sampling rate (10MHz,
25 MHz or 65 MHz).
Note: The following steps also apply to the ADC3642EVM and ADC3644EVM. However, the on board clocking
device limits the ADC3642EVM to 25 MHz and 10 MHz clock frequencies, and the ADC3644EVM is limited to
125 MHz and 65 MHz. If different sampling frequencies are required, please connect an external clock source.
After launching the ADC35xx GUI perform the following steps:
• Under Resolution, select "14 bit".
• Select "65M" for Fs (sample clock).
• Ensure that "CDC Enable" is green (enabled).
• Click "Configure CDC" button.
• Click "Configure" button.
Figure 4-2. ADC35xx GUI settings for Bypass Mode
Device Configuration
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ADC364xEVM Evaluation Module
SBAU232 – OCTOBER 2020
Copyright © 2020 Texas Instruments Incorporated
