Texas Instruments ADC32RF-EVM Series, User Manual, Page: 32 / 44

Quick-Start Procedure for Bypass LMFS 42810 Mode in ADC32RF42 With Internal Clocking
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32 SLAU620D – April 2016 – Revised August 2017
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ADC32RFxx-EVM
7 Quick-Start Procedure for Bypass LMFS 42810 Mode in ADC32RF42 With Internal
Clocking
This section lists the steps to configure ADC32RF42 in 12-bit bypass mode. The steps are the same as
those listed in
Section 3 with a lower clock rate. The ADC32RF42 is internally 2-way interleaved instead of
4-way interleaved as with the ADC32RF45, so many aspects of the operation of the EVM are halved. The
maximum sample rate is 1536 MSPS, half of what the ADC32RF45 would support. The number of lanes
used to transmit the data is halved when in bypass mode, so the LMFS 82820 lane configuration used by
the ADC32RF45 becomes LMFS 42810 with the ADC32RF42. It is important to note that many of the
decimation modes while using the DDC functions are
not halved, and the number of lanes and the LMFS
formats are the same as with the 4-way interleaved device. What is halved is the amount of effective
decimation after setting the decimation factor. For example, to get a decimation factor of 8 with the
ADC32RF42 the SPI register field would be set with the value that would previously have been used to
get a decimation factor of 16 with the ADC32RF45. This may lead to confusion when using the SPI GUI
with the ADC32RF42 and seeing a decimation factor or 16 being reported by the GUI when it is really
decimation by 8 when the ADC32RF42 is being used. The configuration files supplied with the GUI for the
ADC32RF42 already take this difference in decimation factor into account.
7.1 TSW14J56
Follow the steps listed in Section 3.1 .
7.2 ADC32RF42 EVM
Follow the steps listed in Section 3.2 , with the exception of steps 5 and 6. Instead of supplying an external
clock as was done in steps 5 and 6, we will supply the clocking from the onboard LMX2582 frequency
synthesizer.
Fs = 1.536 GHz, LMFS 42810 Example
This example captures data from channel A of the ADC32RF42 EVM sampling at 1.536 GHz with a 900-
MHz input source. The ADC requires the device clock and SYSREF signals to be present
before the ADC
can be properly configured. Use the following steps to configure into this mode:
1. Open the ADC32RFxx EVM GUI.
2. Verify that the green USB Status indicator is lit. If it is not lit, click the Reconnect? button and check
the USB Status indicator again. If it is still not lit then verify the EVM is connected to the computer
through USB. Whenever the USB link is disturbed, the GUI must obtain a new handle to address the
proper USB port, and the
Reconnect? button does that. When the GUI is first launched or the
Reconnect? button is used, the GUI will query the EVM for the type of EVM and the GUI will display
the EVM type. In this case, ADC32RF42 should be displayed.
3. On the PLL1 tab of the LMK04828 tab, press the RESET button.
4. On the ADC32RF42-EVM, press SW1 ( ADC RESET ) to provide a hardware reset to the ADC.
5. Click on the Quick Setup tab.
6. Select the Nyquist Zone for the input. It will be 2nd Nyquist in this example setup (Fs = 1.536M, Fin =
900M).