TVME8240 User Manual Issue 1.2.9
Page 24 of 70
4.1.2 Configuration Register Settings
Register Offset
Register Description
Size
(Byte)
Access Type
Setting
0x00
Vendor ID
2
R
0x1057 (Motorola)
0x02
Device ID
2
R
0x0003 (MPC8240)
0x04
PCI Command Register
2
R/W
0x0006
0x06
PCI Status Register 2
R/C
Status
0x08 Revision
ID
1
R
Reset_Value
0x09
Standard Programming
Interface
1 R
0x00
(Host)
0x0A Subclass
1
R
0x00
0x0B
Class Code
1
R
0x06 (Host)
0x0C
Cache Line Size
1
R/W
Reset_Value
0x0D Latency
Timer
1
R/W
Reset_Value
0x0E Header
Type
1
R
0x00
0x0F BIST
Control
1
R
0x00
0x10
Local Memory Base Address
Register
(LMBAR)
4 R/W
Reset_Value
0x14
Peripheral Control Status
Register Base Address
(PCSRBAR)
4 R/W
0xFCF0_0000
0x30
Expansion ROM Base
Address
4 R
0x0000_0000
0x3C Interrupt
Line
1
R/W
Reset_Value
0x3D Interrupt
Pin
1
R
0x01
0x3E MAX
GNT
1
R
0x00
0x3F MAX
LAT
1
R
0x00
0x40 Bus
Number
1
R/W
0x00
0x41
Subordinate Bus Number
1
R/W
0x00
0x46
PCI Arbiter Control Register
2
R/W
0x8000
0x70
Power Management
Configuration Register 1
2 R/W
0x0000
0x72
Power Management
Configuration Register 2
1 R/W
0x40
0x73
Output Driver Control
Register
1 R/W
0xC0
0x74
Clock Driver Control
Register
2 R/W
0x0000
0x78
Embedded Utilities Memory
Block Base Address
(EUMBBAR)
4 R/W
0xFCF0_0000
0x80,
0x84
Memory Starting Address
Registers
4 R/W
0x4040_4000,
0x4040_4040
0x88, 0x8C
Extended Memory Starting
Address Registers
4 R/W
0x0000_0000,
0x0000_0000
