Terasic ADC-FMC, User Manual

Page: 7 / 23

ADC-FMC User Manual
6
www.terasic.com
April 24, 2020
Chapter 2
Architecture of ADC-FMC
This chapter lists the features and describes the architecture of ADC-FMC daughter card. There are
four ADC channels on the board. Two channels utilize the low pin count of the FMC connector, and
the other two channels utilized the high pin count of the FMC connector. To use four ADC channels,
the mainboard’s FMC connect must support 1.8V full pin count.
2 2 . . 1 1 F F e e a a t t u u r r e e s s
The key features of this module are listed below:
•
Four high speed ADC ports (Connected to 4 SMA connectors)
•
ADC reference clock can come from on-board clock generator, FPGA main board or SMA
connectors.
•
Clock Generator Si5340B. Default output 125MHz clock.
•
Two SMA connectors for clock input.
•
FPC (Full Pin Count) FMC interface
2
2
.
.
2
2
C
C
o
o
m
m
p
p
o
o
n
n
e
e
n
n
t
t
a
a
n
n
d
d
L
L
a
a
y
y
o
o
u
u
t
t
The top view of the ADC-FMC is shown in Figure 2-1 .