58
3-19 LEX eIO connector.
PIN
Description
PIN
Description
1
+12V
2
+12V
3
GND
4
RESET
5
PCIe_TX0_P
6
RESERVED
7
PCIe_TX0_N
8
GND
9
GND
10
PCIe_P0_RX_N
11
PCIe_CLK0_P
12
PCIe_P0_RX_P
13
PCIe_CLK_0_N
14
GND
15
GND
16
PCIe_P1_RX_N
17
PCIe_TX1_P
18
PCIe_P1_RX_P
19
PCIe_TX1_N
20
GND
21
GND
22
RESERVED
23
PCIe_CLK1_P
24
RESERVED
25
PCIe_CLK1_N
26
GND
27
GND
28
SMB_CLK
29
USB_P
30
SMB_DATA
31
USB_N
32
GND
33
GND
34
SLP_S3_N
35
+12V
36
RESERVED
37
+12V
38
GND
39
+12V
40
+12V
EIO1
pin1
40
Summary of Contents for 2I386EW
Page 8: ...3 2 1 3 1 2 3 Photo 1 Insert Unplug...
Page 19: ...14 2 3 Dimension 2I386EW...
Page 20: ...15 2 4 Layout 2I386EW Connector and Jumper TOP JVL1 CBT1...
Page 21: ...16 2 4 1 Layout 2I386EW Connector and Jumper Bottom BOT...
Page 22: ...17 2 4 2 Layout 2I386EW Function MAP TOP...
Page 23: ...18 2 4 3 Layout 2I386EW Function MAP Bottom BOT...
Page 25: ...20 2 5 1 Diagram 2I386EW BOT SATA1 CU1 CU2...
Page 70: ...65 4 6 1 Boot Configuration Select Power on state for Numlock default is ON Numlock...
Page 71: ...66 4 6 2 PCI Express Configuration PCIe 1 2 3 4 configuration settings...