LN920 HW Design Guide
1VV0301730 Rev. 1
Page 35 of 81
2021-08-11
Not Subject to NDA
6.
DIGITAL SECTION
Unless otherwise specified, all interface circuits of the LN920 operate at 1.8V CMOS level.
Only USIM interfaces support dual voltage I/O levels.
The following tables show logic level specifications used in the LN920 interface circuits.
The data specified in the tables below are valid throughout the operating voltage and
temperature range.
Warning: Do not connect LN920
’s digital logic signal
directly to
host digital signals with a voltage higher than 2.3V for 1.8V CMOS
signals
LN920 has four main operation states:
•
OFF state: Vbatt is applied and only RTC is running. Baseband is switched OFF and
the only transition possible is the ON state.
•
ON state: Baseband is fully switched on and LN920 is ready to respond to AT
commands. The modem can be idle or connected.
•
Sleep mode state: Main baseband processor is intermittently switched ON and AT
commands can be processed with some latency. LN920 is idle with low current
consumption.
•
Deep sleep mode state: PSM (Power Saving Mode) as defined in 3GPP Release 12.
Baseband circuitry is switched OFF most of the time.
Note: Throughout this document, all lines that are inverted, that is
are active low, are labelled with a name ending
with”#",”*” or with a
bar above the name.
