LE910C1
Hardware User Guide
1VV0301298 Rev. 1.08 - 2017-11-14
Reproduction forbidden without written authorization by Telit Communications S.p.A. - All Rights Reserved
Telit Confidential Information, provided under NDA
Page
42 of 119
3.3.
LGA Pads Layout
Figure 2: LGA Pads Layout
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
1
ADC
_IN
1
SIM
CLK
2
SIM
RST
2
GN
D
AN
T_D
IV
GN
D
GN
D
GN
D
AN
T_M
AIN
GN
D
VBA
TT
VBA
TT_
PA
VBA
TT_
PA
2
GN
D
RES
SIM
IO2
SIM
VCC
2
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
VBA
TT
VBA
TT_
PA
VBA
TT_
PA
GN
D
3
SIM
VCC
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
GN
D
GN
D
GN
D
GN
D
4
SIM
IN
RES
RES
GN
D
SGM
II_
RX_
P
SGM
II_
RX_
M
SIM
IN2
ADC
_IN
2
RES
RES
RES
GN
D
GN
D
GN
D
RFU
5
SIM
IO
RES
RES
SGM
II_
TX_
P
RES
GN
D
GN
D
GN
D
6
SIM
CLK
DVI_
RX
RES
SGM
II_
TX_
M
RES
GN
D
GN
D
GN
D
7
SIM
RST
DVI_
TX
RES
ADC
_IN
3
GN
D
GN
D
GN
D
RES
RES
RES
GPS
_LN
A_E
N
8
RES
DVI_
CLK
GPIO
_01
RES
GN
D
GN
D
GN
D
WC
I_TX
D_T
GPIO
24
RES
GN
D
GN
D
9
RES
DVI_
WA
0
GPIO
_02
RES
GN
D
GN
D
GN
D
WC
I_RX
D_T
GPIO
25
GPS
_SY
NC
GN
D
AN
T_GP
S
10
RES
I2C_
SDA
GPIO
_03
RES
RFC
LK2
_QC
A
RES
GN
D
GN
D
11
HSIC
_ST
B
I2C_
SCL
GPIO
_04
RES
WLA
N_S
LEEP
_CLK
RES
RES
VAU
X/P
WR
MO
N
12
HSIC
_DA
TA
REF
_CLK
GPIO
_06
RES
MMC
_DA
T0
MMC
_CLK
MMC
_DA
T1
MMC
_DA
T3
MMC
_CMD
MMC
_DA
T2
WIF
I_SD
RST
GN
D
RES
RES
ON
_OF
F*
13
VUS
B
GN
D
GPIO
_07
RES
RES
VMMC
MMC
_CD
WIF
I_SD
3
WIF
I_SD
0
WIF
I_SD
2
WIF
I_SD
CLK
WIF
I_SD
1
WIF
I_SD
CM
D
GN
D
HW
_SHU
TDO
WN
*
14
USB_
ID
GPIO
_05
RES
RES
GN
D
RES
RES
SPI_
CS /
GPIO
_11
RES
RES
C105/
RTS
C108/
DTR
C109/
DCD
C107/
DSR
C125/
RIN
G
15
USB_
D+
USB_
D-
SPI_
MO
SI
/ T
X_A
UX
SPI_
MIS
O
/R
X_A
UX
SPI_
CLK
GPIO
_10
RES
RES
GPIO
_8
GPIO
_9
C104/
RXD
C103/
TXD
C106/
CTS