S42
Hardware User Guide
1VV0301303 Rev. 11
Page 27 of 85
2021-05-06
Not Subject to NDA
NFCANT1
S42
A-3
NFCANT2
A-4
C
tune1
C
tune2
C
p1
C
p2
C
int2
C
int1
NFC-Antenna
Figure 14: S42 NFC Antenna Tuning
𝐶
𝑡𝑢𝑛𝑒
=
2
(2𝜋 × 13,56𝑀𝐻𝑧)
2
× 𝐿
𝑎𝑛𝑡
− 𝐶
𝑝
− 𝐶
𝑖𝑛𝑡
𝐶
𝑡𝑢𝑛𝑒
= 𝐶
𝑡𝑢𝑛𝑒1
= 𝐶
𝑡𝑢𝑛𝑒2
𝐶
𝑝
= 𝐶
𝑝1
= 𝐶
𝑝2
(𝑎𝑛𝑡𝑒𝑛𝑛𝑎 𝑡𝑟𝑎𝑐𝑘 𝑐𝑎𝑝𝑎𝑐𝑖𝑡𝑎𝑛𝑐𝑒)
𝐶
𝑖𝑛𝑡
= 𝐶
𝑖𝑛𝑡1
= 𝐶
𝑖𝑛𝑡2
= 4𝑝𝐹
3.8.2.
Power Back Feeding
If the NFC antenna is exposed to a strong NFC field, power back feeding may occur. That
means, current may flow in the opposite direction on the supply due to parasitic diodes
and ESD structures.
If a battery is used that does not tolerate return current, a series diode must be placed
between the battery and the S42 to protect the battery. An ultra-low forward
voltage Schottky diode should be chosen to keep the battery life reduction as small as
possible.
3.9.
Slow Clock Interface
Even though an external slow clock is not required for BLE operation, consumption of
power during power-down modes can be reduced by connecting an XTAL (32,768kHz) and
two capacitors C1, C2 at pins XL-IN and XL-OUT.
In case no external XTAL is present, the S42 will use an internal slow clock
instead for low power operations.
