19-2233 PC2
2019-02-01
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ADQ7DC Manual
16-1796 PC2 2019-02-01
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4.8 External trigger in the backplane
4.8.1
PXIe interface
There are an external trigger in the backplane of the PXIe version of ADQ7DC. The DSTAR signals are
dedicated matched trigger lines from the system timing slot. To use these triggers, a dedicated timing
generation board has to be used in the system timing slot. The TRIG bus is a general bus in the back-
plane which can be used for triggering. The ADQ support connection to port 0 and port 1 of that bus.
The backplane trigger support both input and output triggers. These operations are independent and
can be used simultaneously.
Figure 13: Bussed connections
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