Tektronix P6450, Instruction Manual

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Reference
This section provides reference information for the P6450 High-Density Probe
with D-Max probing technology.
Designing an Interface Between the Probes and a Target System
Once you have determined which probe is required, use the following information
to design the appropriate connector into your target system board.
Signal Fixturing
Considerations
This section contains information to consider for signal fi xturing.
Clocks and Quali fi ers.
Every logic analyzer has some special purpose input
channels. Inputs designated as clocks can cause the logic analyzer to store data.
Quali
fi ers Clocks Every logic analyzer has some special purpose input channels.
Inputs designated as clocks can cause the logic analyzer to store data. Quali fi er
channels can be logically ANDed and ORed with clocks to further de fi ne when
the logic analyzer should latch data from the system under test. Routing the
appropriate signals from your design to these inputs ensures that the logic analyzer
can acquire data correctly. Unused clocks can be used as quali
fi er signals.
Depending on the channel width, each TLA5000B Series logic analyzer will have
a different set of clock and quali
fi er channels. The following table shows the
clock and quali fi er channels available for each module.
Table 2: Logic analyzer clock and quali fi er availability
TLA
Module Clock Inputs Quali fi er Inputs
CLK:0 CLK:1 CLK:2 CLK:3 QUAL:0 QUAL:1 QUAL:2 QUAL:3
TLA5201B
× ×
TLA5202B
× × × ×
TLA5203B
× × × × × ×
TLA5204B
× × × × × × × ×
All clock and quali fi er channels are stored. The logic analyzer always stores the
logic state of these channels every time it latches data.
Since clock and quali fi er channels are stored in the logic analyzer memory, there
is no need to double probe these signals for timing analysis. When switching
from state to timing analysis, all of the clock and quali
fi er signals will be visible.
This allows you to route signals not needed for clocking to the unused clock
and quali
fi er channels.
P6450 High-Density Logic Analyzer Probe Instruction Manual 13