Tektronix 2230, Service Manual

Page: 87 / 483

Theory of Operation— 2230 Service
Q202 and Q203 through R202 and R203 to return the out­
put of the Delay Line Driver to an average dc voltage of
zero.
Delay Line DL9210 adds about 90 ns of delay to the
vertical signal. In that time, the Sweep Generator has
sufficient time to start producing a sweep before the verti­
cal signal that triggered the sweep reaches the crt. This
permits viewing the leading edge of the triggering signal.
B andw idth L im it
BW LIMIT switch S226, C228, C229, and the diode
bridge formed by CR226, CR227, CR228, and CR229
reduce the bandwidth of the amplifier when desired. With
full 100 MHz bandwidth, R226 is grounded through BW
LIMIT switch S226, and the nonconducting diode bridge
isolates C228 and C229 from the vertical signal. With lim­
ited bandwidth on, R226 is connected to the +8.6 V sup­
ply, and the diode bridge is forward biased. The two
bandwidth limiting capacitors are then in the vertical signal
path, and high-frequency signals (above about 20 MHz)
are attenuated.
V ertical O u tp u t A m p lifie r
The Vertical Output Amplifier drives the vertical
deflection plates of the crt. Signals from the Delay Line go
to a differential amplifier formed by Q230 and Q231 with
tow- and high-frequency compensation provided by the RC
networks between the emitters. Thermal compensation is
provided by thermistor RT236, and overall circuit gain is
set by R233. The output stage of the Amplifier is two
totem-pole transistor pairs, Q254-Q256 and Q255-Q257,
that convert the collector currents of Q230 and Q231 to
proportional output voltages. Resistors R256, R258, R257,
and R259 are feedback elements and bias voltage divid­
ers. Biasing is set so each transistor in a pair develops
one-half the final output voltage on a side. The amplifier
output signals drive the Vertical crt deflection plates.
Beam Find is used to keep the vertical trace within the
graticule area for locating off-screen and over-scanned
traces. When the front-panel BEAM FIND switch opens
the contacts of S390 (found on Diagram 9), the direct
-8 .6 V supply to R261 is removed, and emitter current
goes through R261 and R262 in series. The added series
resistance reduces the amount of available emitter current
and limits the amplifier’s dynamic range. In normal
amplifier operation, S390 connects the —8.6 V supply
directly to R261, and full emitter current is possible in the
output transistors.
A /B S weep S e p a ra tio n C irc u it
The circuit formed by Q283, Q284, Q285, and associ­
ated components acts to vertically position the Nonstore B
trace with respect to the Nonstore A trace in BOTH Hor­
izontal mode. In the B Sweep interval, the SEP signal from
the Alternate Display Switching circuit (Diagram 6) is LO,
and Q283 is biased off. This puts A/B SWP SEP poten­
tiometer R280 in the circuit where it can affect the bias
level on one side of the differential current source formed
by Q284 and Q285. Changing the bias adds a dc offset
current to the Vertical Output Amplifier that moves the B
trace vertically with respect to the A trace.
During the Nonstore A sweep interval, the SEP signal is
HI, and Q283 is turned on to isolate potentiometer R280
from the biasing circuit of Q284. The base voltages of
Q284 and Q285 are then equal. With the same bias to
both sides of the Vertical Output Amplifier, no offset is
added to the A trace. In STORE mode, the HI STORE sig­
nal placed on the base of Q282 keeps Q283 off, and the
A/B Sweep Sep circuit on.
TRIGGERING
The Trigger Amplifiers, shown on Diagram 4, provide
trigger signals to the Sweep Generators from either the
Vertical Preamplifiers, the EXT INPUT connector, or the
power line. The A&B INT switch selects either Channel 1
or Channel 2 as the trigger source, and the A SOURCE
switch selects between internal, line, or external trigger
sources. See Figure 3-4 for the block diagram of the
trigger amplifiers and switching circuitry.
Internal Trigger Pickoff
Signals from the Vertical Preamplifiers drive the CHI
and CH2 Internal Trigger Amplifiers with channel selection
determined by the VERTICAL and HORIZONTAL MODE
switches. Trigger signal pickoff from Channel 1 is done by
Q302 and 0303, and Q327 and Q328 pick off the Chan­
nel 2 internal trigger signal. The circuitry associated with
Channel 2 is the same as that for Channel 1 except for a
trigger offset adjustment. Channel 1 trigger signal circuitry
is described; equivalent components in Channel 2 perform
identically.
Differential vertical signals from the Channel 1
Preamplifier go to Q302 and Q303. These emitter-follower
transistors each drive one input transistor in trigger
preamplifier 1C U310. The collectors of the U310 input
transistors in turn supply emitter current to a pair of two
current-steering transistors. A compensation and biasing
network is connected between the emitters of the input
transistors. Trigger Offset potentiometer R309 in the
emitter circuit adjusts the bias levels of the two input
transistors of U310 to match the dc offsets of the Chan­
nel 1 and Channel 2 Trigger Amplifiers.
3-13