MST9E19A
SXGA/WXGA+ LCD TV Controller with Video Decoder & 10-bit Dual LVDS Transmitter
Preliminary Data Sheet Version 0.1
Version 0.1
5/19/2006
Copyright © 2006 MStar Semiconductor, Inc.
All rights reserved.
Note 1:
Output Type vs. Pin Configuration
Pin #161-192
Pin
LVDS
TTL
160
LVA4P
BA[0]
161
LVA4M
BA[1]
162
LVA3P
BA[2]
163
LVA3M
BA[3]
164
LVACKP
BA[4]
165
LVACKM
BA[5]
166
LVA2P
BA[6]
167
LVA2M
BA[7]
168
LVA1P
GA[0]
169
LVA1M
GA[1]
170
LVA0P
GA[2]
171
LVA0M
GA[3]
172
VDDP
VDDP
173
GND
GND
174
LVB4P
GA[4]
175
LVB4M
GA[5]
Pin
LVDS
TTL
176
LVB3P
GA[6]
177
LVB3M
GA[7]
178
LVBCKP
RA[0]
179
LVBCKM
RA[1]
180
LVB2P
RA[2]
181
LVB2M
RA[3]
182
LVB1P
RA[4]
183
LVB1M
RA[5]
184
LVB0P
RA[6]
185
LVB0M
RA[7]
186
VDDP
VDDP
187
GND
GND
188
GPIOE[3]
LCK
189
GPIOE[2]
LDE
190
GPIOE[1]
LHSYNC
191
GPIOE[0]
LVSYNC