Connectors
Be aware that debug and trace signals from the Emulation adapter superset device are
not connected to the target board. They are exposed only to the connectors on the
Emulation adapter.
P1: CoreSight 20 connector
CoreSight 20 connector P1 exposes debug and trace signals and has the following pinout on
the Emulation Adapter side:
Signal Dir-
ection
Signal Description
Signal
Pin
Pin
Signal
Signal Description
Signal Dir-
ection
I
Reference Voltage
Vref
1
2
SWDIO/TMS
SWD/JTAG
I/O / O
Ground
GND
3
4
SWCLK/TCK
SWD/JTAG
O
Ground
GND
5
6
SWO/TDO
SWD/JTAG
I
Not Connected
KEY
7
8
NC/TDI
Not Connected / JTAG
O
Ground
GND
9
10
nRESET
Reset
I/O
Reference Voltage /
Ground
NC_CAPGND
11
12
TRACECLK
Trace Clock
I
Reference Voltage /
Ground
NC_CAPGND
13
14
TRACEDATA[0]
Trace Data
I
Ground
GND
15
16
TRACEDATA[1]
Trace Data
I
Ground
GND
17
18
TRACEDATA[2]
Trace Data
I
Ground
GND
19
20
TRACEDATA[3]
Trace Data
I
20-pin ARM CoreSight pinout
Signal Direction is described from the BlueBox perspective.
Connectors P3, P4, P5 and P6 on the bottom side of the Emulation Adapter expose all emula-
tion device signals toward the Conversion board, through which the Emulation Adapter adapts
to different pin count packages.
Standalone operation
NXP S32K148 Emulation Adapter is delivered with all components required for a Standalone
operation.
