XLi IEEE 1588 Clock
135
997-01510-03, Rev. C, 12/12/2006
2
5
1
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
For example, enter:
F131 B4 S
Response:
F131 B4:<CR><LF>
PROTOCOL:
SI BURST
PORT<CR><LF>
16 DISABLE ENABLE <CR><LF>
SDN: _DFLT<CR><LF>
CLK CONFIG: SLAVE PRI<CR><LF>
SLAVE SYNC THRESHOLD: 5 microsec<CR><LF>
PREFERRED MASTER: ENABLE<CR><LF>