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USER’S MANUAL

Revision 1.1

Summary of Contents for X10QRH+

Page 1: ...USER S MANUAL Revision 1 1 X10QRH...

Page 2: ...State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardwa...

Page 3: ...U 4 way server platforms Please refer to our website http www supermi cro com for processor and memory support updates Manual Organization Chapter 1 describes the features specifications and performan...

Page 4: ...event damage to the system or injury to yourself Warning Important information given to ensure proper system installation or to prevent damage to the components Note Additional information given to di...

Page 5: ...Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Technic...

Page 6: ...tallation 2 5 Installing the LGA2011 Processor 2 5 Installing a Passive CPU Heatsink 2 9 Installing the Backplate 2 9 Removing the Passive Heatsink 2 10 2 4 Installing and Removing the Memory Modules...

Page 7: ...hassis Intrusion 2 29 2 8 Jumper Settings 2 30 Explanation of Jumpers 2 30 TPM Enable 2 30 CMOS Clear 2 31 Watch Dog Enable Disable 2 31 VGA Enable 2 32 Manufacture Mode Select 2 32 Power Fail Trigger...

Page 8: ...S POST Error Beep Codes BIOS Error Beep Codes A 1 Appendix B Software Installation Instructions B 1 Installing Software Programs B 1 B 2 Configuring SuperDoctor 5 B 2 Appendix C UEFI BIOS Recovery Ins...

Page 9: ...d was designed to be used with an SMCI proprietary chassis as an integrated server platform There will be no shipping package included in the shipment Note For your system to work properly please foll...

Page 10: ...erboard Image Note All graphics shown in this manual were based upon the latest PCB Revision available at the time of publishing of the manual The motherboard you ve received may or may not look exact...

Page 11: ...ORT1 SXB2 SXB1A CPU1_PORT2 SXB1C SXB3A CPU2_PORT1 CPU2_PORT3 SXB3B CPU2_PORT2 SXB3C COM1 UID VGA USB5 6 3 0 USB0 1 HEARTBEATLED S SATA0 3 IPMI_LAN P3 DIMMA1 P3 DIMMA2 P3 DIMMA3 P3 DIMMB1 P3 DIMMB3 P3...

Page 12: ...1A CPU1_PORT2 SXB1C SXB3A CPU2_PORT1 CPU2_PORT3 SXB3B CPU2_PORT2 SXB3C COM1 UID VGA USB5 6 3 0 USB0 1 HEARTBEATLED S SATA0 3 IPMI_LAN P3 DIMMA1 P3 DIMMA2 P3 DIMMA3 P3 DIMMB1 P3 DIMMB3 P3 DIMMD3 P3 DIM...

Page 13: ...ion header JNVI2 C3 4 System Management Bus SMB for non volatile memory headers JP12 JP11 JPWR1 3 8 pin power connectors 1 3 for backplane use JPWR4 7 8 pin power connectors 4 5 6 7 used for GPU devic...

Page 14: ...UID UID Unit Identifier Switch JUIDB1 USB0 1 2 0 Front accessible USB 2 0 header USB 0 1 USB2 3 3 0 Backpanel USB 3 0 ports 2 3 USB4 3 0 Type A USB 3 0 header USB 4 USB 5 6 3 0 Front access USB 5 6 3...

Page 15: ...icro com products motherboard DIMM Sizes Up to 64GB 1 20V Chipset Intel PCH C612 Expansion One 1 PCI Express 3 0 x8 in x16 slot supported by CPU1 SXB2 One 1 PCI Express 3 0 x32 slot supported by CPU1...

Page 16: ...USB Keyboard Plug Play PnP UEFI 2 3 1 and SMBIOS 2 7 or later Power ACPI Power Management Power on mode for AC power recovery Intel Intelligent Power Node Manager available when the NMView utility is...

Page 17: ...D InfiniBand LED UID Remote UID LED System Management PECI Platform Environment Configuration Interface 2 0 support System resource alert via SuperDoctor 5 Thermal Monitor 2 TM2 support SuperDoctor 5...

Page 18: ...5 6 HDR 2X10 TYPE A JVGA1 JTPM1 Dedicated LAN CONN JLAN1 CPU0 PE1 PE2 PE3 CPU2 PE1 PE2 PE3 DMI DDR4 DIMM DDR4 DIMM DDR4 DIMM DDR4 DIMM QPI CPU1 PE1 PE2 PE3 DDR4 DIMM DDR4 DIMM DDR4 DIMM DDR4 DIMM QPI...

Page 19: ...de of server applications The PCH C612 chip in conjunction with the E5 4600v3 v4 processors support the following features Enterprise SMbus and MCTP support DDR4 288 pin memory support on Socket R3 Su...

Page 20: ...st the voltage thresholds to define the sensitivity of the voltage monitor Fan Status Monitor with Firmware Control The system health monitor embedded in the BMC chip can check the RPM status of a coo...

Page 21: ...g and Play BIOS data structures while providing a processor architecture independent implementation that is compatible with Windows 2012 R2 Windows 2016 or newer operating systems 1 6 Power Supply As...

Page 22: ...gement for maximum energy efficiency Although IPNM Specification Version 2 0 3 0 is supported by the BMC Baseboard Management Controller your system must also have IPNM compatible Manage ment Engine M...

Page 23: ...omponents Read this section in its entirety before installing or configuring components in the Supermicro chassis Battery Handling Warning There is a danger of explosion if the battery is replaced inc...

Page 24: ...explosi n si la bater a se reemplaza de manera incorrecta Re emplazar la bater a exclusivamente con el mismo tipo o el equivalente recomen dado por el fabricante Desechar las bater as gastadas seg n...

Page 25: ...dieses Produkts sollte gem allen Bestimmungen und Gesetzen des Landes erfolgen Advertencia Al deshacerse por completo de este producto debe seguir todas las leyes y regla mentos nacionales Attention L...

Page 26: ...ing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching thei...

Page 27: ...eatsink If you buy a CPU separately make sure that you use an Intel certified multi directional heatsink only Make sure to install the system board into the chassis before you install the CPU heatsink...

Page 28: ...beled Close 1st to release the load plate that covers the CPU socket from its locking position 3 With the Close 1st lever fully retracted gently push down on the Open 1st lever to open the load plate...

Page 29: ...the socket Do not drop the CPU on the socket Do not move the CPU horizontally or vertically Do not rub the CPU against the surface or against any pins of the socket to avoid damaging the CPU or the so...

Page 30: ...alled 8 Close the load plate with the CPU inside the socket Lock the Close 1st le ver first then lock the Open 1st lever second Use your thumb to gently push the load levers down to the lever locks Pu...

Page 31: ...at the two mounting holes on the heatsink are aligned with those on the retention mechanism 3 Insert two push pins on the sides of the heatsink through the mounting holes on the motherboard and turn t...

Page 32: ...osen it Repeat the same step to loosen the second push pin 3 Hold the heatsink as shown in the picture below and gently wriggle the heat sink to loosen it Do not use excessive force when wriggling the...

Page 33: ...secure the DIMM module into the slot Press both notches straight down into the memory slot at the same time J12 JPWR6 JPWR4JPWR5 JPWR3 JPWR2JPWR1 JVRM1 JPT1 FAN3 FAN4 FAN5 FAN6 FAN7 FAN10 JIPMB1 LED1...

Page 34: ...B3 D3 D3 Processor and Memory Module Population for Optimal Performance D DIMMs P per C Channel When CPU1 is installed P1 DIMM When CPU2 is installed P2 DIMM When CPU3 is installed P3 DIMM When CPU4...

Page 35: ...6GB 2133 2133 1866 2133 1866 1600 RDIMM DRx4 16GB 32GB 2133 2133 1866 2133 1866 1600 LRDIMM QRx4 32GB 64GB 2133 2133 2133 2133 2133 1600 LRDIMM 3DS 8Rx4 64GB 128GB 2133 2133 2133 2133 2133 1600 Type R...

Page 36: ...ge to these components when installing the motherboard to the chassis J12 JPWR6 JPWR4JPWR5 JPWR3 JPWR2JPWR1 JVRM1 JPT1 FAN3 FAN4 FAN5 FAN6 FAN7 FAN10 JIPMB1 LED1 SP1 JBAT1 JSTBY1 T SGPIO2 JSD2 JSD1 I...

Page 37: ...MC1 P2 DIMMC1 P2 DIMMC2 P2 DIMMC3 P2 DIMMD1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1 P2 DIMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIM...

Page 38: ...9 Key 10 Ground J12 JPWR6 JPWR4JPWR5 JPWR3 JPWR2JPWR1 JVRM1 JPT1 FAN3 FAN4 FAN5 FAN6 FAN7 FAN10 JIPMB1 LED1 SP1 JBAT1 JSTBY1 T SGPIO2 JSD2 JSD1 I SATA4 I SATA5 JP8 JP10 JBT1 JTPM1 JL1 JF1 IPMI CODE BI...

Page 39: ...MMC3 P2 DIMMD1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1 P2 DIMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIMMA3 P1 DI...

Page 40: ...P2 DIMMC2 P2 DIMMC3 P2 DIMMD1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1 P2 DIMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1...

Page 41: ...E 1st OPEN 1st CPU3 CLOSE 1st OPEN 1st CPU2 CLOSE 1st OPEN 1st CPU1 CLOSE 1st OPEN 1st CPU4 GPU POWER FAN8 CPU4 SLOT1 PCI E 3 0X16 PCH BMC J3 JUIDB1 JVRM2 I SATA0 3 JPWR7 P3 DIMMB2 USB2 3 3 0 J13 2 1...

Page 42: ...TA5 JP8 JP10 JBT1 JTPM1 JL1 JF1 IPMI CODE BIOS LICENSE BAR CODE X10QRH USB4 3 0 BACKPLANE POWER JNVI2C4 JNVI2C3 CPU3 SLOT1 PCI E 3 0X16 SXB1B CPU1_PORT3 CPU1_PORT1 SXB2 SXB1A CPU1_PORT2 SXB1C SXB3A CP...

Page 43: ...P4 DIMMB1 P4 DIMMA3 P4 DIMMA2 P4 DIMMA1 P4 DIMMD3 P4 DIMMD2 P4 DIMMC2 P4 DIMMD1 P4 DIMMC3 P4 DIMMC1 P2 DIMMC1 P2 DIMMC2 P2 DIMMC3 P2 DIMMD1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1...

Page 44: ...MC1 P2 DIMMC2 P2 DIMMC3 P2 DIMMD1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1 P2 DIMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIM...

Page 45: ...MMB2 P2 DIMMA2 P2 DIMMB1 P2 DIMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIMMA3 P1 DIMMA2 P1 DIMMA1 JPG1 JWD1 JBR1 JPME2 FAN9 FAN2FAN1...

Page 46: ...1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1 P2 DIMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIMMA3 P1 DIMMA2 P1 DIMMA...

Page 47: ...STBY1 T SGPIO2 JSD2 JSD1 I SATA4 I SATA5 JP8 JP10 JBT1 JTPM1 JL1 JF1 IPMI CODE BIOS LICENSE BAR CODE X10QRH USB4 3 0 BACKPLANE POWER JNVI2C4 JNVI2C3 CPU3 SLOT1 PCI E 3 0X16 SXB1B CPU1_PORT3 CPU1_PORT1...

Page 48: ...IMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIMMA3 P1 DIMMA2 P1 DIMMA1 JPG1 JWD1 JBR1 JPME2 FAN9 FAN2FAN1 Rev 1 01 CLOSE 1st OPEN 1st CPU3 CLOSE 1st OPEN 1st CPU2 CLOSE 1st OP...

Page 49: ...JSD2 JSD1 I SATA4 I SATA5 JP8 JP10 JBT1 JTPM1 JL1 JF1 IPMI CODE BIOS LICENSE BAR CODE X10QRH USB4 3 0 BACKPLANE POWER JNVI2C4 JNVI2C3 CPU3 SLOT1 PCI E 3 0X16 SXB1B CPU1_PORT3 CPU1_PORT1 SXB2 SXB1A CPU...

Page 50: ...2 JSD1 I SATA4 I SATA5 JP8 JP10 JBT1 JTPM1 JL1 JF1 IPMI CODE BIOS LICENSE BAR CODE X10QRH USB4 3 0 BACKPLANE POWER JNVI2C4 JNVI2C3 CPU3 SLOT1 PCI E 3 0X16 SXB1B CPU1_PORT3 CPU1_PORT1 SXB2 SXB1A CPU1_P...

Page 51: ...IMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIMMA3 P1 DIMMA2 P1 DIMMA1 JPG1 JWD1 JBR1 JPME2 FAN9 FAN2FAN1 Rev 1 01 CLOSE 1st OPEN 1st C...

Page 52: ...D1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIMMA3 P1 DIMMA2 P1 DIMMA1 JPG1 JWD1 JBR1 JPME2 FAN9 FAN2FAN1 Rev 1 01 CLOSE 1st OPEN 1st CPU3 CLOSE 1st OPEN 1st CPU2 CLOSE 1st OPEN 1st CPU1 CLOSE 1st OPEN 1st CP...

Page 53: ...1 JPG1 JWD1 JBR1 JPME2 FAN9 FAN2FAN1 Rev 1 01 CLOSE 1st OPEN 1st CPU3 CLOSE 1st OPEN 1st CPU2 CLOSE 1st OPEN 1st CPU1 CLOSE 1st OPEN 1st CPU4 GPU POWER FAN8 CPU4 SLOT1 PCI E 3 0X16 PCH BMC J3 JUIDB1 J...

Page 54: ...DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIMMA3 P1 DIMMA2 P1 DIMMA1 JPG1 JWD1 JBR1 JPME2 FAN9 FAN2FAN1 Rev 1 01 CLOSE 1st OPEN 1st CPU3 CLOSE 1st OPEN 1st CPU2 CLOSE 1st OPEN 1st CP...

Page 55: ...16 SXB1B CPU1_PORT3 CPU1_PORT1 SXB2 SXB1A CPU1_PORT2 SXB1C SXB3A CPU2_PORT1 CPU2_PORT3 SXB3B CPU2_PORT2 SXB3C COM1 UID VGA USB5 6 3 0 USB0 1 HEARTBEATLED S SATA0 3 IPMI_LAN P3 DIMMA1 P3 DIMMA2 P3 DIMM...

Page 56: ...MC2 P2 DIMMC3 P2 DIMMD1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1 P2 DIMMA3 P2 DIMMA1 P1 DIMMC3 P1 DIMMC2 P1 DIMMD2 P1 DIMMC1 P1 DIMMD3 P1 DIMMD1 P1 DIMMB3 P1 DIMMB2 P1 DIMMB1 P1 DIM...

Page 57: ...DIMMB1 P4 DIMMA3 P4 DIMMA2 P4 DIMMA1 P4 DIMMD3 P4 DIMMD2 P4 DIMMC2 P4 DIMMD1 P4 DIMMC3 P4 DIMMC1 P2 DIMMC1 P2 DIMMC2 P2 DIMMC3 P2 DIMMD1 P2 DIMMD2 P2 DIMMD3 P2 DIMMB3 P2 DIMMB2 P2 DIMMA2 P2 DIMMB1 P2...

Page 58: ...PCI E 3 0X16 SXB1B CPU1_PORT3 CPU1_PORT1 SXB2 SXB1A CPU1_PORT2 SXB1C SXB3A CPU2_PORT1 CPU2_PORT3 SXB3B CPU2_PORT2 SXB3C COM1 UID VGA USB5 6 3 0 USB0 1 HEARTBEATLED S SATA0 3 IPMI_LAN P3 DIMMA1 P3 DIM...

Page 59: ...WR6 JPWR4JPWR5 JPWR3 JPWR2JPWR1 JVRM1 JPT1 FAN3 FAN4 FAN5 FAN6 FAN7 FAN10 JIPMB1 LED1 SP1 JBAT1 JSTBY1 T SGPIO2 JSD2 JSD1 I SATA4 I SATA5 JP8 JP10 JBT1 JTPM1 JL1 JF1 IPMI CODE BIOS LICENSE BAR CODE X1...

Page 60: ...he motherboard and chassis 2 Disconnect all ribbon wire cables from the motherboard including those for the keyboard and mouse 3 Remove all add on cards 4 Install CPU 1 first making sure that it is fu...

Page 61: ...ugging the power cord and contracting both pads on the CMOS Clear Jumper JBT1 Refer to Section 2 8 in Chapter 2 2 Remove all components from the motherboard especially the DIMM mod ules Make sure that...

Page 62: ...5 Make sure that all memory modules are fully seated in their slots Follow the instructions given in Section 2 4 in Chapter 2 6 Please follow the instructions given in the DIMM Population Tables liste...

Page 63: ...ables are connected and working properly 3 Using minimum configuration for troubleshooting Remove all unnecessary components starting with add on cards first and use minimum configuration with a CPU a...

Page 64: ...apter or see the FAQs on our website http www supermicro com before contacting Technical Support 2 BIOS upgrades can be downloaded from our website http www supermicro com 3 If you still cannot resolv...

Page 65: ...way a damaged battery may release hazardous materials into the environment Do not discard a used battery in the garbage or a public landfill Please comply with the regulations set up by your local ha...

Page 66: ...ade your BIOS if you are not experiencing any problems with your system Updated BIOS files are located on our website at http www supermicro com Please check our BIOS warning message and the informati...

Page 67: ...BIOSname 4 The FLASH NSH script will compare the Flash Descriptor Table FDT code in the new BIOS with the existing one in the motherboard a If a different FDT is found A new file STARTUP NSH will be...

Page 68: ...displayed on the outside of the shipping carton and the shipping package is mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when servic...

Page 69: ...ll the options that can be configured Grayed out options cannot be configured Options in blue can be configured by the user The right frame displays the key legend Above the key legend is an area rese...

Page 70: ...ity From the main menu you can access the other setup screens An AMI BIOS identification string is displayed at the left bottom corner of the screen below the copyright message Warning Do not upgrade...

Page 71: ...at Note The time is in the 24 hour format For example 5 30 P M appears as 17 30 00 Supermicro X10QRH BIOS Version This item displays the SMC version of the BIOS ROM used in this system Build Date This...

Page 72: ...rmal POST messages The options are Enabled and Disabled AddOn ROM Display Mode Use this item to set the display mode for the Option ROM Select Keep Current to use the current AddOn ROM Display setting...

Page 73: ...es occurs The options are Enabled and Disabled Power Button Function If this item is set to Instant Off the system will power off immediately as soon as the user presses the power button If this item...

Page 74: ...Enable to support Intel s Hyper threading Technology to enhance CPU per formance The options are Enable and Disable Cores Enabled Use this item to set the number of CPU cores to be enabled in your sy...

Page 75: ...lable when supported by the CPU If set to Enable the DCU Streamer Prefetcher will prefetch data streams from the cache memory to the DCU to speed up data accessing and processing to enhance CPU perfor...

Page 76: ...ion is set to Custom or Energy Efficient the following items will display Energy Performance Tuning Available when Power Technology is set to Custom or Energy Efficient Select Enable for energy perfor...

Page 77: ...ts only Select SW_ALL to change the P state coordination type for all software installed in the system Select SW_ANY to change the P state coordination type for a software program in the system The op...

Page 78: ...ble IIO0 Configuration IOU2 IIO PCIe Port 1 This feature allows the user to set the bus speed between the IOU2 and the PCI Exp port specified above The options are x4x4 x8 and Auto IOU0 IIO PCIE Port...

Page 79: ...e this feature to set the length of time required for the port specified by the user to complete the transition from L0s to L0 The default setting is 4uS 8uS PCI E Port L1 Exit Latency Use this featur...

Page 80: ...down the system The options are Disable and Enable PCI E Port Link Select Disable to disable the link that is not involved in training activities but its CFG is still active The options are Enable and...

Page 81: ...ic for the port specified by the user The options are Disable and Enable L0s Support When this item is set to Disable IIO will not put its transmitter in the L0s state The options are Disable and Enab...

Page 82: ...ions are Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB and P9 0 0 3 5 dB Hide Port Select Yes to hide the PCI E por...

Page 83: ...is still active The options are Enable and Disable Link Speed Use this item to select the link speed for the PCI E port specified by the user The options are GEN1 2 5 GT s GEN2 5 GT s GEN3 8 GT s and...

Page 84: ...PM ACPI event Select Disable to generate an MSI message The options are Disable and Enable Gen3 Generation 3 Eq Equalization Mode Use this item to set the Adaptive Equalization mode for PCI E Generati...

Page 85: ...the OS The options are No and Yes IIO2 Configuration IOU2 IIO PCIe Port 1 This feature allows the user to set the bus speed between the IOU2 and the PCI Exp port specified above The options are x4x4...

Page 86: ...s are Enable and Disable Link Speed Use this item to select the link speed for the PCI E port specified by the user The options are GEN1 2 5 GT s GEN2 5 GT s GEN3 8 GT s and Auto PCI E Port DeEmphasis...

Page 87: ...ent Select Disable to generate an MSI message The options are Disable and Enable Gen3 Generation 3 Eq Equalization Mode Use this item to set the Adaptive Equalization mode for PCI E Generation 3 devic...

Page 88: ...ified from the OS The options are No and Yes IIO3 Configuration IOU2 IIO PCIe Port 1 This feature allows the user to set the bus speed between the IOU2 and the PCI Exp port specified above The options...

Page 89: ...le and Disable Link Speed Use this item to select the link speed for the PCI E port specified by the user The options are GEN1 2 5 GT s GEN2 5 GT s GEN3 8 GT s and Auto PCI E Port DeEmphasis Use this...

Page 90: ...PM ACPI event Select Disable to generate an MSI message The options are Disable and Enable Gen3 Generation 3 Eq Equalization Mode Use this item to set the Adaptive Equalization mode for PCI E Generati...

Page 91: ...cantly reduces CPU overhead by leveraging CPU architectural improvements and freeing the system resource for other tasks The options are Enable and Disable No Snoop Select Enable to support no snoop m...

Page 92: ...Siz Size Link Frequency Select Use this feature to select the desired frequency for QPI Link connections The options are 6 4GB s 8 0GB s 9 6GB s Auto and Auto Limited Link L0p Enable Select Enable fo...

Page 93: ...tant for Virtualization Technology The options are Enable and Disable Memory Configuration Enforce POR Select Enable to enforce POR restrictions on DDR4 frequency and voltage programming The options a...

Page 94: ...figure the following Memory RAS settings RAS Mode When Disable is selected RAS is not supported When Mirror is selected the motherboard maintains two identical copies of all data in memory for data ba...

Page 95: ...s are Disable and Enable South Bridge Configuration The following South Bridge information will display USB Configuration USB Module Version USB Devices Legacy USB Support Select Enabled to support on...

Page 96: ...he options are Disabled and Enabled XHCI Extensible Host Controller Interface Pre Boot Drive Select Enabled to enable XHCI Extensible Host Controller Interface support on a pre boot drive specified by...

Page 97: ...TA port specified by the user The options are Disabled and Enabled SATA Port 0 Port 5 Hot Plug Select Enabled to enable hot plugging support for a port specified by the user which will allow the user...

Page 98: ...load a legacy driver for system boot The options are Disabled EFI and Legacy SATA sSATA RAID Boot Select Select SATA Controller to boot the system from a SATA RAID device Select sSATA Controller to b...

Page 99: ...The options are Enabled and Disabled Configure sSATA as Select IDE to configure an sSATA drive specified by the user as an IDE drive Select AHCI to configure an sSATA drive specified by the user as a...

Page 100: ...re sSATA as is set to IDE the following items will display sSATA Port 0 Port 3 This item indicates that an sSATA port specified by the user is installed pres ent or not sSATA Port 0 Port 3 sSATA Devic...

Page 101: ...e designates this port for hot plugging Set this item to Enabled for hot plugging support which will allow the user to replace an sSATA drive without shutting down the system The options are Enabled a...

Page 102: ...Select 32 to set the PCI latency timer to 32 PCI clock cycles The options are 32 64 96 128 160 192 224 and 248 PCI Bus Clocks PERR Generation Select Enabled to allow a PCI device to generate a PERR PC...

Page 103: ...el based on the system configuration Select Disabled to disable ASPM support The options are Disabled and Auto Warning Enabling ASPM support may cause some PCI E devices to fail MMIOHBase Use this ite...

Page 104: ...ronment or UEFI Uni fied Extensible Firmware Interface for network stack support The options are Enabled and Disabled Super IO Configuration Super IO Chip AST2400 Serial Port 1 Configuration Serial Po...

Page 105: ...abled the following items will become available for configuration COM1 Console Redirection Settings Available when COM1 port is detected Terminal Type This feature allows the user to select the target...

Page 106: ...or Console Redirection to prevent data loss caused by buffer overflow Send a Stop signal to stop sending data when the receiving buffer is full Send a Start signal to start sending data when the recei...

Page 107: ...Character set Select VT100 to add color and function key support Select ANSI to use the Extended ASCII Character Set Select VT UTF8 to use UTF8 encoding to map Unicode characters into one or more byt...

Page 108: ...and Disabled Recorder Mode Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server The options are Disabled and Enabled Resolution 100x31 Select Ena...

Page 109: ...M2 Console Redirection Terminal Type Use this feature to select the target terminal emulation type for Console Redirec tion Select VT100 to use the ASCII character set Select VT100 to add color and fu...

Page 110: ...ts this feature Select Enabled to enable Non Uniform Memory Access support to enhance system performance The options are Enabled and Disabled Trusted Computing Available when a TPM device is installed...

Page 111: ...re Enabled and Disabled Note For more information on TPM please refer to the TPM manual at http www supermicro com manuals other TPM pdf iSCSI Configuration This item displays iSCSI configuration info...

Page 112: ...abled Erasing Settings Erase Event Log Select Enabled to erase all error events in the SMBIOS System Management BIOS log before an event logging is initialized at bootup The options are No and Yes Whe...

Page 113: ...ow long in minutes the multiple event counter should wait before generating a new event log Enter a number between 0 to 99 The default setting is 60 Note Please reboot the system for the changes to ta...

Page 114: ...the BMC installed in your system System Event Log Enabling Disabling Options SEL Components Select Enabled to enable all system event logging support at bootup The options are Enabled and Disabled Era...

Page 115: ...tings at the next system boot The options are Yes and No Configuration Address Source Available when the item above Update IPMI LAN Configuration is set to Yes Use this item to select the IP address s...

Page 116: ...the system Administrator Password Use this feature to set the administrator password which is required before the user entering the BIOS setup utility The length of the password should be from 3 char...

Page 117: ...ys Select Enable to install all manufacturer defaults for the following system security settings The options are Yes and No Save All Secure Boot Variables This feature allows the user to save the secu...

Page 118: ...ect Yes to confirm that a new database will be set in the NVRAM Non Volatile RAM Append DB DataBase Select Yes to load the new database from the manufacturer defaults Select No to load the new databas...

Page 119: ...BX files from the Non Volatile RAM NVRAM Set New DBX Select Yes to confirm that the new DBX files will be downloaded to the Non Volatile RAM NVRAM Append DBX DataBase Timer Select Yes to load the new...

Page 120: ...to select the type of device to be used for system boot The options are Legacy UEFI and Dual Fixed Boot Order Priorities This option prioritizes the order of bootable devices from which the system wi...

Page 121: ...vice to delete from the boot priority list Delete Boot Option Select the target boot device to delete Delete Driver Option Use this item to select a boot driver to delete from the boot priority list D...

Page 122: ...nges and Reset When you have completed the system configuration changes select this option and press Enter to leave the BIOS setup utility and reboot the computer for the new system configuration para...

Page 123: ...ults To set this feature select this option and press Enter to save current default settings for future use Restore User Defaults To set this feature select this option and press Enter to retrieve use...

Page 124: ...should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list correspond to the n...

Page 125: ...must be installed such as the chipset driver After accessing the product drivers and utilities page go into the CDR_Images directory and locate the ISO file for your motherboard Download this file to...

Page 126: ...t Server SSM Server you can remotely control power on off and reset chassis intrusion for multiple systems with SuperDoctor 5 or IPMI SD5 Manage ment Server monitors HTTP and SMTP services to optimize...

Page 127: ...er This password can be found on a label on the motherboard When logging in to the BMC for the first time please use the unique password provided by Supermicro to log in You can change the unique pass...

Page 128: ...off control to a computer system at bootup C 2 How to Recover the UEFI BIOS Image the Main BIOS Block A UEFI BIOS flash chip consists of a recovery BIOS block and a main BIOS block a main BIOS image...

Page 129: ...a USB attached device follow the instruc tions below 1 Using a different machine copy the Super ROM binary image file into the disc root directory of a USB device or a writeable CD DVD Note If you can...

Page 130: ...want to start with BIOS recovery If you decide to proceed with BIOS recovery follow the procedures below 5 When the screen as shown above displays using the arrow key select the item Proceed with flas...

Page 131: ...eing the message that BIOS update is completed unplug the AC power cable from the power supply to clear the CMOS and then plug the AC power cable into the power supply again to power on the system 10...

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