17
Chapter 1: Introduction
Figure 1-7. 620BT-HNTR System Block Diagram
System Block Diagram
The block diagram below shows the connections and relationships between the subsystems
and major components of the overall system.
SYS-620BT-HNTR Block Diagram
SCC-F6N6T-B1
PC
I-E
X
16
PC
I-E X
8
8 x SATA3
BPN-NVMe4-827BHQ-S3
(3 NVMe/SATA support)
For
LSI Module
PCI-E X1
US
B
SFI
IMC0 4CH
IMC1 4CH
SL
OT
1
VCCP1 12v
VR13.HC
7+1 PHASE
250W
UPI
10.4/11.2G
CPU#1
SNB CORE
DDR4
PCIE: 64
SOCKET ID:0
P0
P1
P2
P3
#0 #1 #2 #3 DMI3
CPU#2
SNB CORE
DDR4
PCIE: 64
SOCKET ID:1
P2
P1
P0
P3
#2 #1 #0 #3 DMI3
UPI
UPI
UPI
UPI
DDR
4
2933/
3200
A1
B1
C1/2
D1
DDR
4
2933/
3200
E1
F1
G1/2
H1
IMC0 4CH
IMC1 4CH
DDR
4
2933/
3200
A1
B1
C1/2
D1
DDR
4
2933/
3200
E1
F1
G1/2
H1
VCCP0 12v
VR13.HC
7+1 PHASE
250W
PCI-E X16
SX
B4
PCI-E X16
#2C
SX
B5
#2A, 2B
For
M.2 Riser
SX
B3
PCI-E X16
AIOM
PCI-E X16
PCI-E X1
DMI3
SX
B1
PCI-E X16
SL
OT
2
PCI-E X16
SX
B2
PCI-E X8
8 x SATA3
SAT
A1
6.0 Gb/S
4 x SATA3
SAT
A2
6.0 Gb/S
SX
B5
USB 2.0
US
B
USB 3.0
NCSI Header
SW
BMC
AST2600
USB 2.0
PCH
LBG-1G 15W
PCH_PCIE #4
SFI
DMI3
NCSI
I-SATA0-7
S-SATA2-5
S-SATA0-1
PCH_PCIE #5
#12 USB2.0
RM
II/
NC
SI
RGRMII
LAN3
RTL8211F
RJ45
ESPI
DDR4
ESPI
Header
VGA CONN
COM1
Connector
Temp Sensor
NCT7718W
BMC Flash
RoT
BIOS
SPI
SPI
TPM HEADER
Debug Card
SPI