Version 1.0
Page 12 of 44
SMT370v2 User Manual
LEDs.
Seven LEDs (Figure 9 - Connector Location.)are available on the board. Four
(denoted 1, 2, 3 and 4 on the PCB – top left) of them, green, are driven by the FPGA.
In the default bitstream, they indicate what follows:
1 -> Flashing under the ADC sampling clock (it can be useful to check that the
LED is flashing when using an external sampling clock signal),
2 -> Flashing under the DAC sampling clock,
3 -> Direct To DAC mode selected when ON,
4 -> ON when a data is being read out of the DAC FIFO.
Two green LEDs, located at the bottom left and right of the board indicate the status
of the power supplies. Both should be on when the board is under power.
A red LED located on the top right of the board indicated when the FPGA is not
programme. In normal operation, i.e. J8 fitted (Figure 9 - Connector Location.), it
flashes once at power-up and after a module reset.
Sundance Standards.
Communication Ports.
CommPorts (Communication ports) links follow Texas Instrument C4x standard. They
are 8-bit parallel inter-processor ports of the ‘C4x processors.
The CommPorts drive at 3.3v signal levels.
The FPGA can implement up to two FIFO buffered CommPort interfaces fully
compliant with the TIM standard. They are guaranteed for a transfer rate of 20MB/s.
The FIFOs are useful to maintain a maximum bandwidth and to enable parallel
transfers.
Therefore, as an example, each CommPort can be associated with two 15x32-bit
unidirectional FIFOs implemented into the FPGA; one for input and one for output.
An additional one-word buffer makes them appear as 16x32-bit FIFOs.
DATA
D[0..31]
FIFO
16 x 32 x 2
D[0..7]
Control Logic and Status
STRB RDY REQ ACK
Port x
