Sun Microsystems Netra T4 AC100, Service And System Reference Manual

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10-14 Netra T4 AC100/DC100 Service and System Reference Manual • August 2001
FIGURE 10-8
PCIO-2 Block Diagram
PCI Interface
The PCI-B interface is 64-bit wide at 33 MHz. It supports slave (for PIO) and master
(for DMA) transactions on the PCI bus. Master transactions use 256-byte burst
transfers.
Note –
The byte burst rate is programmable and can vary.
The PCIO-2 is a multi-function PCI device as defined by the PCI specification, and it
supports a separate configuration space for each of the three interfaces. See
Section 10.2.7, “PCI Bus” on page 10-22 for details.
EBus DMA
4 DMA
channels
EBus control
EBus channel
Not used
1394 channel
Enet DMA
2 DMA
channels
GEM
Ethernet channel
USB DMA
1 DMA
channel
USB channel
MII
Ethernet PHY
PCI Bus
MISC
JTAG
Ethernet 10/100 BASE T
USB EBus
Bist
10/100
Mbit/sec.
12 Mbit/sec.
5 Mbit/sec.
Not used
Not used
PCI
Configuration
Space
(Multi-function)
Bus Adaptor
64-bit PCI bus (rev. 2.1 compliant)
33 MHz
Double write buffers
USB
Control
Hub