DocID018909 Rev 11
RM0090
USB on-the-go high-speed (OTG_HS)
1529
Figure 415. Receive FIFO read task
•
Bulk and control OUT/SETUP transactions
A typical bulk or control OUT/SETUP pipelined transaction-level operation is shown in
. See channel 1 (ch_1). Two bulk OUT packets are transmitted. A control
SETUP transaction operates in the same way but has only one packet. The
assumptions are:
–
The application is attempting to send two maximum-packet-size packets (transfer
size = 1, 024 bytes).
–
The nonperiodic transmit FIFO can hold two packets (128 bytes for FS).
–
The nonperiodic request queue depth = 4.
•
Normal bulk and control OUT/SETUP operations
The sequence of operations for channel 1 is as follows:
a) Initialize channel 1
b) Write the first packet for channel 1
c) Along with the last DWORD write, the core writes an entry to the nonperiodic
request queue
d) As soon as the nonperiodic queue becomes nonempty, the core attempts to send
an OUT token in the current frame
e) Write the second (last) packet for channel 1
f)
The core generates the XFRC interrupt as soon as the last transaction is
completed successfully
g) In response to the XFRC interrupt, de-allocate the channel for other transfers
h) Handling
nonACK
responses
RXFLVL
interrupt ?
Read the received
packet from the
Receive FIFO
Read
OTG_FS_GRXSTSP
PKTSTS
0b0010?
Yes
Yes
Unmask RXFLVL
interrupt
BCNT > 0?
No
Mask RXFLVL
interrupt
Yes
Unmask RXFLVL
interrupt
No
No
Start
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