RM0082
RS_Color liquid crystal display controller (CLCD)
Doc ID 018672 Rev 1
735/844
33
RS_Color liquid crystal display controller (CLCD)
33.1 Overview
Within the Reconfigurable Array Subsystem, SPEAr300 can provide an ARM PrimeCell®
Color Liquid Crystal Display Controller (CLCD) that provides all the necessary control
signals to interface directly to a variety of color and monochrome LCD panels.
Main features of the Color Liquid Crystal Display Controller are:
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Compliance to the
AMBA specification (Rev 2.0)
onwards for easy integration into SoC
implementation
●
Dual 16-deep programmable 32 bit wide FIFOs for buffering incoming display data
●
Supports single and dual panel mono
super twisted nematic
(STN) displays with 4 or 8
bit interfaces
●
Supports single and dual-panel color and monochrome STN displays
●
Supports thin film transistor (TFT) color displays
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Resolution programmable up to 1024 x 768
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15 gray-level mono, 3375 color STN, and 32K color TFT support
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1, 2, or 4 bits-per-pixel (bpp) palettized displays for mono STN
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1, 2, 4 or 8 bpp palettized color displays for color STN and TFT
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16 bits-per-pixel (bpp) true-color non-palettized, for color STN and TFT
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24 bpp true-color non-palettized, for color TFT
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Programmable timing for different display panels
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256 entry, 16 bit palette RAM, arranged as a 128 x 32 bit RAM physically frame, line
and pixel clock signals
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AC bias signal for STN and data enable signal for TFT panels.
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Patented Gray Scale Algorithm.
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Supports little Endian, Big Endian and WindowsCE data formats.