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SR10B

User’s Manual

Revision Date: Oct. 07. 2016

43

the receiving buffers are full, a “stop” signal can be sent to stop the data flow. Once the buffers

are empty,a “star” signal can be sent to re-start the flow. Hardware flow control uses two wires

to sendstart/stop signals. The options are None, Hardware RTS/CTS, Software Xon/xoff

Data bits:

8

Parity:

None

Stop bits:

1

4.4.13 Network Stack

Network stack settings

Network Stack

Enable/Disable UEFI network stack

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Summary of Contents for SR10B

Page 1: ...User s Manual Revision Date Oct 07 2016 SR10B MIL STD Rugged Computer User s Manual ...

Page 2: ...mpany If the power supply is broken do not try to fix it by yourself Contact a qualified service technician or your local distributor Operation safety Before installing the motherboard and adding devices on it carefully read all the manuals that came with the package Before using the product make sure all cables are correctly connected and the power cables are not damaged If you detect any damage ...

Page 3: ...n Add WatchDog Function Packing list SR10B MIL STD Rugged Computer Vibration Isolation Base Accessories Kit Terminal block 4 PIN x 1pcs Screw Package CD Driver User s Manual Ordering Information Model Number Description SR10B UT Intel QM87 MIL STD Fanless Rugged System with Intel Core i7 4700EQ Haswell Processor 9V to 36V DC in Wide Temp 40 to 70 C With a vibration isolation base ...

Page 4: ...tures 5 1 2 Front Panel Components 7 1 3 Back Panel Components 8 1 4 Mechanical Dimensions 9 Chapter 2 Jumpers and Connectors 10 2 1 Front Panel Connector Pin Definitions 10 2 3 Internal Connector and Jumper Setting 13 Chapter 3 Installation 14 3 1 HDD tray 14 3 3 Vibration Isolation Base 15 Chapter 4 AMI BIOS UTILITY 16 4 1 Starting 16 4 3 Main Menu 17 4 4 Advanced Menu 18 4 4 1 PCI Subsystem Set...

Page 5: ...Intel Anti Theft Technology Configuration 35 4 4 8 AMT Configuration 36 4 4 9 USB Configuration 38 4 4 10 IT8786 Super IO Configuration 39 4 4 11 IT8786 HW Monitor 41 4 4 12 Serial Port Console Redirection 42 4 4 13 Network Stack 43 4 5 Chipset 45 4 5 1 PCH IO configuration 46 4 5 2 System AGENT SA 56 4 6 Boot 58 4 7 Security 59 4 8 Save and Exit 60 ...

Page 6: ... 5V 12V selectable Power 1 x Terminal Block Rear I O Ethernet 4 x RJ45 COM 2 x RS232 422 485 with 5V 12V selectable Default RS232 USB 2 x USB 3 0 DVI I 1 x 29 pin DVI I connector DisplayPort 2 x 20 pin DP connector Audio 1 x MIC 1 x Line out Display Display Interface 1 x DVI I connectors female resolution up to 1920 x 1200 60 Hz 2 x DisplayPort DisplayPort connectors female resolution up to 3840 x...

Page 7: ...cations MIL STD 810G Test Method 507 5 Procedure II Temperature Humidity Method 514 6 Procedure I Category 20 24 Vibration Method 516 6 Procedure I Mechanical Shock Method 501 5 Procedure I Storage High Temperature Method 501 5 Procedure II Operation High Temperature Method 502 5 Procedure I Storage Low Temperature Method 502 5 Procedure II Operation Low Temperature Method 503 5 Procedure I Temper...

Page 8: ...SR10B User s Manual Revision Date Oct 07 2016 7 1 2 Front Panel Components 1 2 x USB 3 0 Type A 2 LED Indicators 3 2 x DB9 2 x RS232 4 Power Button 5 Power Input 9 36V DC in 6 Swappable 2 5 HDD Tray ...

Page 9: ...l Revision Date Oct 07 2016 8 1 3 Back Panel Components 1 Audio Jack 1 x MIC 1 x Line Out 2 4 x RJ45 LAN Ports 3 2 x DisplayPort 4 1 x DVI I 5 2 x DB 1 x RS232 422 485 with 5V 12V selectable 1 x RS232 6 2 x USB3 0 Type A ...

Page 10: ...SR10B User s Manual Revision Date Oct 07 2016 9 1 4 Mechanical Dimensions ...

Page 11: ...SR10B User s Manual Revision Date Oct 07 2016 10 Chapter 2 Jumpers and Connectors This chapter describes the jumpers and connectors on the systems motherboard 2 1 Front Panel Connector Pin Definitions ...

Page 12: ...SR10B User s Manual Revision Date Oct 07 2016 11 ...

Page 13: ...SR10B User s Manual Revision Date Oct 07 2016 12 ...

Page 14: ...SR10B User s Manual Revision Date Oct 07 2016 13 2 3 Internal Connector and Jumper Setting ...

Page 15: ...users the steps to install the HDD tray and vibration isolation base 3 1 HDD tray Loosen the screws and pull out the 2 5 HDD tray Pick 4 screws from the screw package Put 2 5 HDD on the tray and use T9 torx driver to screw it up Make sure HDD is fixed and push the tray back 3 2 Navigation Keys ...

Page 16: ... Date Oct 07 2016 15 3 3 Vibration Isolation Base Let the computer be upside down Locate the vibration isolation base on the computer by the screw holes Pick 6 screws from the screw package Use Phillips screwdriver to screw it up ...

Page 17: ...steps Turn on the computer and press the Del key immediately After the Del key is pressed the main BIOS setup menu displays Other setup screens can be accessed from the main BIOS setup menu such as the Chipset and Power menus 4 2 Navigation Keys The BIOS setup utility uses a key based navigation system called hot keys Most of the BIOS setup utility hot keys can be used at any time during the setup...

Page 18: ...SR10B User s Manual Revision Date Oct 07 2016 17 4 3 Main Menu The Main menu is the screen that first displays when BIOS Setup is entered unless an error has occurred ...

Page 19: ...em Date Set the date Use Tab to switch between date elements System Time Set the time Use Tab to switch between time elements Access Level Displays the access level of the current user in the BIOS 4 4 Advanced Menu This section allows you to configure and improve your system and allows you to set up some system features according to your preference ...

Page 20: ...ation Enables or Disables PCI Device to Generate SERR PCI Express Settings Change PCI Express Devices Settings PCI Express Device Register Settings Relaxed Ordering Enables or Disables PCI Express Device Relaxed Ordering Extended Tag If ENABLED allows Device to use 8 bit Tag field as a requester No Snoop Enabled or Disables PCI Express Device No Snoop option Maximum Payload Set Maximum Payload of ...

Page 21: ...re will take to retrain the link if previous training attempt was unsuccessful Link Training Time out uS Defines number of Microseconds software will wait before polling Link training bit in link status register Value range from 10 to 10000 uS Unpopulated Links In order to save power software will disable unpopulated PCI Express Links If this option save to Disable Link Restore PCIE Registers On n...

Page 22: ...onfiguration Enable Hibernation Enables or Disables system ability to hibernate OS S4 sleep state This option may be not effective with some OS ACPI Sleep State Select ACPI sleep state the system will enter when the suspend button is pressed Lock Legacy Resources Enable or disable lock of legacy resource S3 Video Repost Enable or disable S3 Video Repost ...

Page 23: ...SR10B User s Manual Revision Date Oct 07 2016 22 4 4 3 CPU configuration CPU Configuration Parameters ...

Page 24: ...SR10B User s Manual Revision Date Oct 07 2016 23 ...

Page 25: ...Bit XD can prevent certain classes of malicious buffer overflow attecks when combined with a supporting OS Intel Virtualization Technology When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Hardware Prefetcher Enable the mid level cache L2 streamer prefetcher Adjacent Cache Line Prefetcher Enable the mid level cache L2 prefetching of adjacent cach...

Page 26: ... DDR Power Limit2 DDR Power limit2 value 1 Core Ratio Limit This limit is for 1 core active 0 means using the factory configured value 2 Core Ratio Limit This limit is for 2 cores active 0 means using the factory configured value 3 Core Ratio Limit This limit is for 3 cores active 0 means using the factory configured value 4 Core Ratio Limit This limit is for 4 cores active 0 means using the facto...

Page 27: ...PI CTDP BIOS Enable Disable ACPI CTDP BIOS support Configurable TDP level Allows reconfiguration of TDP levels base on current power and thermal delivery capabilities of the system Configure TDP lock Lock the Config TDP control register TCC activation offset Offset from the factory TCC activation temperature Intel TXT LT Support Only Disable ACPI T state Enable Disable ACPI T state support CPU DTS...

Page 28: ...on Date Oct 07 2016 27 Debug interface lock Lock CPU debug interface setting IOUT OFFSET Sign 0 positive offset 1 negative offset IOUT OFFSET VR IOUT OFFSET configuration 0 625 IOUT SLOPE VR IOUT SLOPE configuration range 0 1023 ...

Page 29: ...SR10B User s Manual Revision Date Oct 07 2016 28 4 4 4 SATA Configuration This section is used to configure the SATA drives ...

Page 30: ...on Determines how SATA controller s operate The options are IDE AHCI RAID SATA Test Selection Enable or disable Test Mode Aggressive LPM Support Enable PCH to aggressively enter link power state SATA Controller Speed Indicates the maximum speed the SATA controllers can support The options are default Gen1 Gen2 Gen3 ...

Page 31: ...s enabled on the OS IRRT Only on eSATA If enabled then only IRRT volumes can span internal and eSATA drives If disabled then any RAID volume can span internal and eSATA drives Smart Response Technology Enabled or disable Smart Response Technology OROM UI Delay If enabled indicates the delay of the OROM UI Splash Screen in a normal status The options are 2 seconds 4 seconds 6 seconds 8 seconds Seri...

Page 32: ...ive Spin Up Device On an edge detec from 0 to 1 the PCH starts a COMRESET initialization sequence to the device Serial ATA Port 3 Port 3 Enable or disable SATA port Hot Plug Designates this port as Hot Pluggable External SATA External SATA support SATA device type Identify the SATA port is connected to Solid State Drive or Hard Disk Drive Spin Up Device On an edge detec from 0 to 1 the PCH starts ...

Page 33: ...H starts a COMRESET initialization sequence to the device Serial ATA Port 5 Port 5 Enable or disable SATA port Hot Plug Designates this port as Hot Pluggable External SATA External SATA support SATA device type Identify the SATA port is connected to Solid State Drive or Hard Disk Drive Spin Up Device On an edge detec from 0 to 1 the PCH starts a COMRESET initialization sequence to the device ...

Page 34: ...SR10B User s Manual Revision Date Oct 07 2016 33 4 4 5 Intel Rapid Start Technology Enable or disable Intel Rapid Start Technology ...

Page 35: ...nfiguration Configure Management Engine Technology Parameters MDES BIOS Status Code Enable Disable MDES BIOS Status Code Firmware Update Configuration Configure Management Engine Technology Parameters Me FW Image Re Flash Enable Disable Me FW Image Re Flash function ...

Page 36: ... Technology Configuration Disabling Intel AT allow user to login to platform This is strictly for testing only This does not disable Intel AT services in ME Intel Anti Theft Technology Enable Disable Intel AT in BIOS for testing On Enter Intel AT Suspend Mode Only Disabled ...

Page 37: ...s option just controls the BIOS extension execution If enabled this requires additional firmware in the SPI device BIOS Hotkey Pressed OEMFlag Bit 1 Enable Disable BIOS hotkey press MEBx Selection Screen OEMFlag Bit 2 Enable Disable MEBx selection screen Hide Un Configure ME Confirmation OEMFlag Bit 6 Hide Un Configure ME without password Configuration prompt MEBx Debug Message Output OEMFlag Bit ...

Page 38: ...re sending ASF_GET_BOOT_OPTIONS Disable ME Set ME to Soft Temporary Disabled ASF Enable Disable Alert Specification Format Activate Remote Assistance Process Trigger CIRA boot USB Configure Enable Disable USB Configure function PET Progress User can Enable Disable PET Events progress to receive PET events or not WatchDog Enable Disable WatchDog Timer ...

Page 39: ...evices available only for EFI applications USB3 0 Support Enable Disable USB3 0 XHCI Controller support XHCI Hand off This is a workaround for OSes without XHCI hand off support The XHCI ownership change should be claimed by XHCI driver EHCI Hand off This is a workaround for OSes without EHCI hand off support The EHCI ownership change should be claimed by EHCI driver USB Mass Storage Driver Suppor...

Page 40: ...c Device reset time out USB mass storage device Start Unit command time out The options are 10 sec 20 sec 30 sec 40 sec Device power up delay Maximum time the device will take before it properly reports itself to the Host Controller Auto uses default value for a Hub port the delay is taken from Hub descriptor The options are Auto manual 4 4 10 IT8786 Super IO Configuration System Super IO Chip Par...

Page 41: ...Enable or Disable Serial Port COM Device Settings IO 3E8h IRQ 7 Change Settings Select an optimal setting for Super IO device Serial Port 4 Configuration Set Parameters of Serial Port 3 COMD Serial Port Enable or Disable Serial Port COM Device Settings IO 2E8h IRQ 7 Change Settings Select an optimal setting for Super IO device Serial Port 5 Configuration Set Parameters of Serial Port 4 COME Serial...

Page 42: ...SR10B User s Manual Revision Date Oct 07 2016 41 4 4 11 IT8786 HW Monitor Monitor hardware status ...

Page 43: ...ws Server OS through a serial port The options are COM0 Disabled COM1 Pci Bus0 Dev0 Func0 Disabled Terminal Type VT UTF8 is the preferred terminal type for out of band management The next best choice is VT100 and then VT100 See above in Console Redirection Settings page for more Help withTerminal Type Emulation The options are VT100 VT100 VT UTF8 ANSI Bits per second selects serial port transmissi...

Page 44: ...flow Once the buffers are empty a star signal can be sent to re start the flow Hardware flow control uses two wires to sendstart stop signals The options are None Hardware RTS CTS Software Xon xoff Data bits 8 Parity None Stop bits 1 4 4 13 Network Stack Network stack settings Network Stack Enable Disable UEFI network stack ...

Page 45: ...rnet device parameters PORT CONFIGURATION MENU NIC Configuration Configure Boot Protocol wake on LAN Link Speed and VLAN Blink LEDs Identify the physical network port by blinking the associated LED PORT CONFIGURATION INFORMATION Link Status Link Status Virtual MAC Address Programmatically assignable MAC address for port ...

Page 46: ...nual Revision Date Oct 07 2016 45 4 5 Chipset This section gives you functions to configure the system based on the specific features of the chipset The chipset manages bus speeds and access to system memory resources ...

Page 47: ...l Force L0s Force all links to L0s State AUTO BIOS auto configure DISABLE Disables ASPM The options are Disabled L0s L1 L0SL1 Auto L1 Substates PCI Express L1 Substates setting The options are Disabled L1 1 L1 2 L1 1 L1 2 URR Enable or disable PCI Express Unsupported Request Reporting FER Enable or disable PCI Express Device Fatal Error Reporting NFER Enable or disable PCI Express Device Non Fatal...

Page 48: ...r PCH PCIE PCI Express Root Port2 control the PCI Express Root port the options are enabled disabled ASPM Support Set the ASPM Level Force L0s Force all links to L0s State AUTO BIOS auto configure DISABLE Disables ASPM L1 Substates PCI Express L1 Substates setting URR Enable or disable PCI Express Unsupported Request Reporting FER Enable or disable PCI Express Device Fatal Error Reporting NFER Ena...

Page 49: ...configure DISABLE Disables ASPM L1 Substates PCI Express L1 Substates setting URR Enable or disable PCI Express Unsupported Request Reporting FER Enable or disable PCI Express Device Fatal Error Reporting NFER Enable or disable PCI Express Device Non Fatal Error Reporting CER Enable or disable PCI Express Device Correctable Error Reporting CTO Enable or disable PCI Express Completion Timer TO SEFE...

Page 50: ...t5 control the PCI Express Root port the options are enabled disabled ASPM Support Set the ASPM Level Force L0s Force all links to L0s State AUTO BIOS auto configure DISABLE Disables ASPM L1 Substates PCI Express L1 Substates setting URR Enable or disable PCI Express Unsupported Request Reporting FER Enable or disable PCI Express Device Fatal Error Reporting NFER Enable or disable PCI Express Devi...

Page 51: ...ncy Ocerride Snoop Latency Ocerride for PCH PCIE Non Snoop Latency Ocerride Non Snoop Latency Ocerride for PCH PCIE PCI Express Root Port6 control the PCI Express Root port the options are enabled disabled ASPM Support Set the ASPM Level Force L0s Force all links to L0s State AUTO BIOS auto configure DISABLE Disables ASPM L1 Substates PCI Express L1 Substates setting URR Enable or disable PCI Expr...

Page 52: ... 48K Range for this Root Bridge PCIE LTR PCIE Latency Reporting Enable Disable PCIE LTR Lock PCIE LTR Configuration Lock Snoop Latency Ocerride Snoop Latency Ocerride for PCH PCIE Non Snoop Latency Ocerride Non Snoop Latency Ocerride for PCH PCIE PCI Express Root Port7 control the PCI Express Root port the options are enabled disabled ASPM Support Set the ASPM Level Force L0s Force all links to L0...

Page 53: ...ange for this Root Bridge Prefetchable Memory Prefetchable Memory Range for this Root Bridge Reserved I O Reserved I O 4K 8K 12K 16K 48K Range for this Root Bridge PCIE LTR PCIE Latency Reporting Enable Disable PCIE LTR Lock PCIE LTR Configuration Lock Snoop Latency Ocerride Snoop Latency Ocerride for PCH PCIE Non Snoop Latency Ocerride Non Snoop Latency Ocerride for PCH PCIE PCI Express Root Port...

Page 54: ...tra Bus Reserved Extra Bus Reserved 0 7 for bridges behind this Root Bridge Reseved Memory Reserved Memory Range for this Root Bridge Prefetchable Memory Prefetchable Memory Range for this Root Bridge Reserved I O Reserved I O 4K 8K 12K 16K 48K Range for this Root Bridge PCIE LTR PCIE Latency Reporting Enable Disable PCIE LTR Lock PCIE LTR Configuration Lock Snoop Latency Ocerride Snoop Latency Oc...

Page 55: ...ard NIC Wake on LAN Enable or disable integrated LAN to wake the system The Wake On LAN cannot be disabled if ME is on at Sx state SLP_LAN Low on DC Power Enable Disable SLP_LAN Low on DC Power Board Capability Board Capability SUS_PWR_DN_ACK Send Disabled to PCH DeepSx Show DeepSx Policies GP27 Wake From DeepSx Wake from DeepSx by the assertion of GP27 pin PCIE Wake From DeepSx Wake from DeepSx b...

Page 56: ...SR10B User s Manual Revision Date Oct 07 2016 55 Watch Dog Function select ...

Page 57: ...evice should be Primary PEG Primary PCIE Select Auto PCIE1 PCIE2 PCIE3 PCIE4PCIE5 PCIE6 PCIE7 Graphics device should be Primary PCIE Internal Graphics Keep IGD enabled based on the setup options Aperture Size Select the Aperture Size DVMT Pre Allocated Select DVMT 5 0 Pre Allocated fixed Graphics memory size used by the internal graphics device DVMT Total Gfx Mem Select DVMT5 0 total graphic memor...

Page 58: ...lect the LCD panel scaling option used by the Internal Graphics Device Backlight control backlight control setting Panel Color Depth select the LFP panel color depth Memory Configuration DIMM profile Select DIMM timing profile that should be used Memory Frequency Limiter maximum memory frequency selections in Mhz DDR Reset Wait Time The value of ns to wait for switch DDR voltage minimum 20ns ECC S...

Page 59: ...Enables or disables Quiet Boot option Fast Boot Enables or disables boot with initialization of a minimal set of devices required to launch active boot option Has no effect for BBS boot options Boot option priorities Boot Option 1 Sets the system boot order Hard Drive BBS Priorities Set the order of the legacy devices in this group CSM16 Parameters Set the order of the legacy devices in this group...

Page 60: ...ap Response BIOS reaction on INT19 trapping by option ROM IMMEDIATE execute the trap right away POSTPONES execute the trap during legacy boot CSM Parameters OpROM execution boot options filter etc 4 7 Security Use the Security Menu to establish system passwords Administrator Password Set Administartor Password User Password Set User Password HDD Security Configuration Set HDD Password ...

Page 61: ...m setup without saving any changes Save Changes and Reset Reset the system after saving the changes Discard Changes and Reset Reset system setup without saving any changes Save Options Save Changes Save Changes done so far to any of the setup options Discard Changes Discard Changes done so far to any of the setup options Restore Defaults Restore Load Default values for all the setup options Save a...

Page 62: ...l Revision Date Oct 07 2016 61 Restore the User Defaults to all the setup options Launch EFI Shell from filesystem device Attempts to launch EFI Shell application Shellx64 efi from one of the available filesystem devices ...

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