Parallel ports
UM0404
DocID13284 Rev 2
Figure 51. Block diagram of Port7 pins 7...4
6.10 Port8
If this 8-bit port is used for general purpose I/O, the direction of each line can be configured
via the corresponding direction register DP8. Each port line can be switched into push-pull
or open-drain mode via the open-drain control register ODP8.
Since in ST10F276 the XPWM (or PWM1) and XASC (or ASC1) are implemented on P8.0-
P8.3 and P8.6-P8.7 respectively, when these modules are enabled through the XPERCON
register, the corresponding bits of P8, DP8 and ODP8 are overwritten by the new
Open Drain
Latch
Write ODP7.y
Read ODP7.y
Direction
Latch
Write DP7.y
Read DP7.y
Int
ernal Bus
MUX
0
1
Alternate Latch Data Input
Input
Latch
Clock
P7.y
CCzIO
Output
Buffer
Alternate
Data
Output
MUX
0
1
Output
Latch
≥
1
Write Port P7.y
Compare Trigger
Read P7.y
y = (7...4)
z = (31...28)
Alternate Pin Data Input