STA382BW
Register description: Sound Terminal compatibility
Doc ID 022783 Rev 1
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7.6.7 External
amplifier
power-down
The EAPD register directly disables/enables the internal power circuitry.
When EAPD = 0, the internal power section is placed in a low-power state (disabled). This
register also controls the EAPD/FFX4B output pin when OCFG = 10.
7.7
Volume control registers (addr 0x06 - 0x0A)
7.7.1 Mute/line
output
configuration register
Line output is only active when OCFG = 00. In this case LOC determines the line output
configuration. The source of the line output is always channel 1 and 2 inputs.
Table 132.
External amplifier power-down
Bit
R/W
RST
Name
Description
7
R/W
0
EAPD
0: External power stage power-down active
1: Normal operation
D7
D6
D5
D4
D3
D2
D1
D0
LOC1
LOC0
Reserved
BQBALL
C3M
C2M
C1M
MMUTE
0
0
0
0
0
0
0
0
Table 133.
Line output configuration
LOC[1:0]
Line output configuration
00
Line output fixed - no volume, no EQ
01
Line output variable - CH3 volume effects line output, no EQ
10
Line output variable with EQ - CH3 volume effects line output
11
Reserved
Bit
R/W
RST
Name
Description
4
R/W
0
BQBALL
Global biquad bypass
0: Biquad filters active
1: All the biquad filters are bypassed (pass-through)
Obsolete Product(s) - Obsolete Product(s)