Spectrum M2p.59 Series, Hardware Manual, Page: 95 / 190

Clock generation External reference clock
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Termination of the clock input
If the external connector is used as an input, either for feeding in an external reference clock or for external clocking you can enable a
50 Ohm termination on the board. If the termination is disabled, the impedance is high. Please make sure that your source is capable of
driving that current and that it still fulfills the clock input specification as given in the technical data section.
Clock threshold level
The external clock input of the M2p cards allows to set a threshold level in the range of ± 5V to adopt the input to different logic standards
(such as 1.5V LVTTL, 3.3V LVTTL, 5VTTL etc) as well as to allow to detect an externally AC-coupled clock by setting the level to 0 mV.
The threshold levels for the external clock is to be programmed in mV:
Example for setting the external clock threshold level:
As the digital bandwidth filter of the M2p.591x cards does require the generation of a higher internal ADC
sample rate, it is not available when using direct external clocking (clock mode SPC_CM_EXTERNAL). Please
see the „Setting up the inputs“ chapter for details on the digital bandwidth filter for these cards.
External reference clock
If you have an external clock generator with a extremely stable frequency, you can use it as a reference clock. You can connect it to the
external clock connector and the PLL will be fed with this clock instead of the internal reference. The following table shows how to enable the
reference clock mode:
Due to the fact that the driver needs to know the external fed in frequency for an exact calculation of the sampling rate you must set the
SPC_REFERENCECLOCK register accordingly as shown in the table below. The driver automatically then sets the PLL to achieve the desired
sampling rate. Please be aware that the PLL has some internal limits and not all desired sampling rates may be reached with every reference
clock.
Example of reference clock:
The reference clock must be defined via the SPC_REFERENCECLOCK register prior to defining the sample rate
via the SPC_SAMPLERATE register to allow the driver to calculate the proper clock settings correctly.
Table 49: Spectrum API: clock termination software register
Register Value Direction Description
SPC_CLOCK50OHM 20120 read/write A „1“ enables the 50 Ohm termination at the external clock connector.
Table 50: Spectrum API: clock threshold software registers and available range therefore
Register Value Direction Description Range
SPC_CLOCK_AVAILTHRESHOLD_MIN 42423 read returns the minimum clock threshold level to be programmed in mV
SPC_CLOCK_AVAILTHRESHOLD_MAX 42424 read returns the maximum clock threshold level to be programmed in mV
SPC_CLOCK_AVAILTHRESHOLD_STEP 42425 read returns the step size of clock threshold level to be programmed in mV
SPC_CLOCK_THRESHOLD 42410 read/write Threshold level for clock input -5000 mV to +5000 mV
spcm_dwSetParam_i32 (hDrv,
SPC_CLOCK_THRESHOLD
, 1500); // set threshold to 1.5V, suitable for 3.3V LVCMOS clock
Table 51: Spectrum API: clock mode software register and external reference clock
Register Value Direction Description
SPC_CLOCKMODE 20200 read/write Defines the used clock mode
SPC_CM_EXTREFCLOCK 32 Enables internal PLL with external reference for sample clock generation
Table 52: Spectrum API: reference clock software register
Register Value Direction Description
SPC_REFERENCECLOCK 20140 read/write Programs the external reference clock in the range as stated in the technical data section..
External sampling rate in Hz as an integer value You need to set up this register exactly to the frequency of the external fed in clock.
spcm_dwSetParam_i32 (hDrv, SPC_CLOCKMODE, SPC_CM_EXTREFCLOCK); // Set to reference clock mode
spcm_dwSetParam_i32 (hDrv, SPC_REFERENCECLOCK, 10000000); // Reference clock that is fed in is 10 MHz
spcm_dwSetParam_i32 (hDrv, SPC_SAMPLERATE, 25000000); // We want to have 25 MHz as sampling rate