Spectrum M2p.59 Series, Hardware Manual, Page: 159 / 190

Timestamps Timestamp modes
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The following table shows the valid values that can be written to the timestamp command register.
Refclock mode
In addition to the counter counting the samples a second separate counter is utilized. An additional external signal is used, which affects both
counters and needs to be fed in externally. This external reference clock signal will reset the sample counter and also increase the second
counter. The second counter holds the number of the clock edges that have occurred on the external reference clock signal and the sample
counter holds the position within the current reference clock period with the resolution of the sampling rate.
This mode can be used to obtain an absolute time reference when using an external radio clock or a GPS receiver. In that case the higher
part is counting the seconds since the last reset and the lower part is counting the position inside the second using the current sampling rate.
Please keep in mind that as this mode uses an additional external signal and can therefore only be used
when connecting an reference clock signal on the related connector on the card:
• X0 on M4i/M4x and related digitizerNETBOX products
• X1 on M2p and related digitizerNETBOX products
The counting is initialized with the timestamp reset command. Both counters will then be set to zero.
The following table shows the valid values that can be written to the timestamp command register for this mode:
To synchronize the external reference clock signal with the PC clock it is possible to perform a timestamp reset command which waits a
specified time for the occurrence of the external clock edge. As soon as the clock edge is found the function stores the current PC time and
date which can be used to get the absolute time. As the timestamp reference clock can also be used with other clocks that don’t need to be
synchronized with the PC clock the waiting time can be programmed using the SPC_TIMESTAMP_TIMEOUT register.
Table 93: Spectrum API: timestamp commands for star-reset mode
Register Value Direction Description
SPC_TIMESTAMP_CMD 47000 read/write Programs a timestamp mode and performs commands as listed below
SPC_TSMODE_DISABLE 0 Timestamp is disabled.
SPC_TSMODE_STARTRESET 4h Counter is reset on every card start, all timestamps are in relation to card start.
SPC_TSCNT_INTERNAL 100h Counter is running with complete width on sampling clock
Table 94: Spectrum API: timestamp commands for refclock mode
Register Value Direction Description
SPC_TIMESTAMP_STARTTIME 47030 read/write Return the reset time when using reference clock mode. Hours are placed in bit 16 to 23, minutes are
placed in bit 8 to 15, seconds are placed in bit 0 to 7
SPC_TIMESTAMP_STARTDATE 47031 read/write Return the reset date when using reference clock mode. The year is placed in bit 16 to 31, the month
is placed in bit 8 to 15 and the day of month is placed in bit 0 to 7
SPC_TIMESTAMP_TIMEOUT 47045 read/write Sets a timeout in milli seconds for waiting for a reference clock edge
SPC_TIMESTAMP_CMD 47000 read/write Programs a timestamp mode and performs commands as listed below
SPC_TSMODE_DISABLE 0 Timestamp is disabled.
SPC_TS_RESET 1h The counters are reset and the local PC time is stored for read out by SPC_TIMESTAMP_STARTTIME and SPC_TIME -
STAMP_STARTDATE registers.
SPC_TS_RESET_WAITREFCLK 8h Similar as SPC_TS_RESET, but aimed at SPC_TSCNT_REFCLOCKxxx modes: The counters are reset then the driver
waits for the reference edge as long as defined by the timeout time. After detecting the edge, the local PC time is
stored for read out by SPC_TIMESTAMP_STARTTIME and SPC_TIMESTAMP_STARTDATE registers.
SPC_TSMODE_STANDARD 2h Standard mode, counter is reset by explicit reset command.
SPC_TSMODE_STARTRESET 4h Counter is reset on every card start, all timestamps are in relation to card start.
SPC_TSCNT_REFCLOCKPOS 200h Counter is split, upper part is running with external reference clock positive edge, lower part is running with sampling
clock
SPC_TSCNT_REFCLOCKNEG 400h Counter is split, upper part is running with external reference clock negative edge, lower part is running with sam -
pling clock
Image 74: drawing of timestamp acquisition in refclock mode in relation to card start and trigger detection