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Multi Purpose I/O Lines
Additional I/O lines with Option -DigSMB and -DigFX2
(c) Spectrum Instrumentation GmbH
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Each mask constant has to be bitwise AND combined with a source/mode constant, to define which digital source will be inserted at which
position of the analog sample. The SPC_DIGMODEx register defines then, what analog channel this is applied to.
The driver will automatically scale the analog samples prior to inserting the digital channels to keep the channel at the maximum possible
resolution.
For convenience the one pre-defined AND/OR combination to completely replace all the Bits of an analog channel with the sixteen bits
(X19...X4) is provided by the means of SPCM_DIGMODE_CHREPLACE. The value of this constant is derived from the following AND/OR
combination:
Sample Format (with up to 3 digital channels)
Any channels that will not store any digital inputs within their samples still provide the full 16 bit resolution. :
* Any X-input can be used as a source for that digital channel, except X0, which is output only.
DIGMODEMASK_BIT9
00000200h
Enable acquisition of X13 into bit9 of the analog sample.
DIGMODEMASK_BIT8
00000100h
Enable acquisition of X12 into bit8 of the analog sample.
DIGMODEMASK_BIT7
00000080h
Enable acquisition of X11 into bit7 of the analog sample.
DIGMODEMASK_BIT6
00000040h
Enable acquisition of X10 into bit6 of the analog sample.
DIGMODEMASK_BIT5
00000020h
Enable acquisition of X9 into bit5 of the analog sample.
DIGMODEMASK_BIT4
00000010h
Enable acquisition of X8 into bit4 of the analog sample.
DIGMODEMASK_BIT3
00000008h
Enable acquisition of X7 into bit3 of the analog sample.
DIGMODEMASK_BIT2
00000004h
Enable acquisition of X6 into bit2 of the analog sample.
DIGMODEMASK_BIT1
00000002h
Enable acquisition of X5 into bit1 of the analog sample.
DIGMODEMASK_BIT0
00000001h
Enable acquisition of X4 into bit0 of the analog sample.
// #define SPCM_DIGMODE_CHREPLACE 0xFFBBCFFF
// --> this is functional equivalent to
// #define SPCM_DIGMODE_CHREPLACE ((DIGMODEMASK_BIT15 & SPCM_DIGMODE_X19)\
// |(DIGMODEMASK_BIT14 & SPCM_DIGMODE_X18)\
// |(DIGMODEMASK_BIT13 & SPCM_DIGMODE_X17)\
// |(DIGMODEMASK_BIT12 & SPCM_DIGMODE_X16)\
// |(DIGMODEMASK_BIT11 & SPCM_DIGMODE_X15)\
// |(DIGMODEMASK_BIT10 & SPCM_DIGMODE_X14)\
// |(DIGMODEMASK_BIT9 & SPCM_DIGMODE_X13)\
// |(DIGMODEMASK_BIT8 & SPCM_DIGMODE_X12)\
// |(DIGMODEMASK_BIT7 & SPCM_DIGMODE_X11)\
// |(DIGMODEMASK_BIT6 & SPCM_DIGMODE_X10)\
// |(DIGMODEMASK_BIT5 & SPCM_DIGMODE_X9 )\
// |(DIGMODEMASK_BIT4 & SPCM_DIGMODE_X8 )\
// |(DIGMODEMASK_BIT3 & SPCM_DIGMODE_X7 )\
// |(DIGMODEMASK_BIT2 & SPCM_DIGMODE_X6 )\
// |(DIGMODEMASK_BIT1 & SPCM_DIGMODE_X5 )\
// |(DIGMODEMASK_BIT0 & SPCM_DIGMODE_X4 ))
Table 77: Spectrum API: data organization for different digital input option configurations
Standard Mode
1 digital input enabled
2 digital inputs enabled
3 digital inputs enabled
Data bit
16 bit
ADC resolution
15 bit
ADC resolution
14 bit
ADC resolution
13 bit
ADC resolution
D15
ADx Bit 15 (MSB)
Digital bit 0 (any X input)*
Digital bit 0 (any X input)*
Digital bit 0 (any X input)*
D14
ADx Bit 14
ADx Bit 15 (MSB)
Digital bit 1 (any X input)*
Digital bit 1 (any X input)*
D13
ADx Bit 13
ADx Bit 14
ADx Bit 15 (MSB)
Digital bit 2 (any X input)*
D12
ADx Bit 12
ADx Bit 13
ADx Bit 14
ADx Bit 15 (MSB)
D11
ADx Bit 11
ADx Bit 12
ADx Bit 13
ADx Bit 14
D10
ADx Bit 10
ADx Bit 11
ADx Bit 12
ADx Bit 13
D9
ADx Bit 9
ADx Bit 10
ADx Bit 11
ADx Bit 12
D8
ADx Bit 8
ADx Bit 9
ADx Bit 10
ADx Bit 11
D7
ADx Bit 7
ADx Bit 8
ADx Bit 9
ADx Bit 10
D6
ADx Bit 6
ADx Bit 7
ADx Bit 8
ADx Bit 9
D5
ADx Bit 5
ADx Bit 6
ADx Bit 7
ADx Bit 8
D4
ADx Bit 4
ADx Bit 5
ADx Bit 6
ADx Bit 7
D3
ADx Bit 3
ADx Bit 4
ADx Bit 5
ADx Bit 6
D2
ADx Bit 2
ADx Bit 3
ADx Bit 4
ADx Bit 5
D1
ADx Bit 1
ADx Bit 2
ADx Bit 3
ADx Bit 4
D0
ADx Bit 0 (LSB)
ADx Bit 1 (LSB)
ADx Bit 2 (LSB)
ADx Bit 3 (LSB)
Summary of Contents for M2p.59 Series
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