HCD-FZ900KW/FZ900M
HCD-FZ900KW/FZ900M
26
26
5-4. BLOCK DIAGRAM – DSP Section –
AMP_DMIX
AMP_D1
AMP_D2
AMP_D3
BCKO
LRCKO
MCKO
FLAG0 INT_REQ 15
FLAG1 DIR_ERR 16
X301
24.576MHz
X700
25MHz
DIR_RST
DIR_ZERO
SI_A
DIR_CLK
DIR_CE
DIR_DIN
DIR_CLK
DIR_DIN
DIR_DO
DIR_ERR
DIR_XSTATE
CSFLAG
DSP_SPICLK
DSP_MISO
DIR_XSTATE
LRCK
4
2
26
16
15
24
14
23
25
7
11
18
19
12
J501
IC502
OPTICAL
RECEIVER
IC304
DIR
IC700
DSP
IC303
A/D CONVERTER
IC306
SACD SELECT
IC703
DATA LATCH
IC503 (4/6)
SYSTEM CONTROL
IC702
BUS BUFFER
IC705
AND GATE
Q700
DELAY
IC701
DATA SELECT
IC505
EEPROM
IC706
EEPROM
COAXIAL
OPTICAL
TV DIGITAL IN
EZW-T100
CN103
FZ900M
FZ900KW
S-AIR
TRANSMITTER
L-IN
ACLK
ALRCK
ABCK
AMP_D00
AMP_D01
AMP_D02
R-IN
SPICLK
DIR_XSTATE
DIR_ERR
DIR_CE
DIR_DO
CSFLAG
RESET
DET
ADC_SEL
I2C_SDA
I2C_SCL
SACD_SEL
LRCK
BCK
SI_C
SI_D
SI_B
DSP_SF_CE
DSP_MASTER
SF_MASTER
SF_CE
DIR_RST
DIR_ZERO
SACD_SEL
BCK
SD1
SD2
R-CH
L-CH
DSP_MASTER
DSP_MASTER
ADC_SEL
LCH
RCH
SD2
SD1
BCK1
BCK2
LRCK1
LRCK2
GND
I2C_SDA
I2C_SCL
RESN
GPIO2
RESET
DET
INT
INT
•
SIGNAL PATH
: TUNER
DSP_MOSI
X800
12.288kHz
IC805
SAMPLE RATE CONVERTER
IC808
DATA SELECT
IC802
CLOCK GENERATOR
IC807
A/D CONVERTER
IC806
SAMPLE RATE CONVERTER
EZW-RT10
CN803
S-AIR
TRANSCEIVER
SDIN_B (Surr)
13
SDIN_A (2nd)
SDIN_C
ADC_SEL
I2C_SDA
I2C_SCL
INT
RESET
RESET
VCC_3.3V
VCC+3.3V
(S-AIR-INC)
DET
20
19
BCK
17
LRCK
15
14
11
3
7
12
2
SD2 (SL/SR)
SD1 (DMIX)
BCK
LRCK
L-CH
R-CH
Summary of Contents for HCD-FZ900KW
Page 107: ...MEMO HCD FZ900KW FZ900M 107 ...