6-36
VPL-HS2
6-36
QA
QA
24LC21AT/SN (IC102)
5
7
6
8
4
1
2
3
I/O
CONTROL
LOGIC
MEMORY
CONTROL
LOGIC
XDEC
EEPROM
ARRAY
PAGE LATCHES
H/V
GENERATOR
SENSE AMP
R/W CONTROL
YDEC
SDA
VCLK
SCL
VCC
VSS
NC NC NC
BA05FP-E2 (IC201, 304)
3
2
1
REFFERENCE
VOLTAGE
VCC
GND
OUT
BU4052BCFV-E2 (IC305, 306)
LEVEL
CONVERTER
BINARY TO 1 OF 4
DECODER WITH INHIBIT
VDD 16
INH 6
A 10
B 9
VSS 8
VEE 7
X
13
Y
3
X0 12
X1 14
X2 15
X3 11
Y0 1
Y1 5
Y2 2
Y3 4
M52347FP-TE (IC203)
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
CLAMP
GEN
EDGE
SW
LOGIC
LOGIC
SYNC
SEP
V. SYNC
SEP
V TIME
GATE
V
DET
V
SHAPE
H
DET
H
SHAPE
V S/S
IN
V S/S
OUT
VD+
OUT
HD+
OUT
CLAMP+
OUT
CLAMP+
TIMING
CLAMP
SW
V
CC
HD–
OUT
V. POL
V. STATE
H. STATE
H. POL
GND
GREEN
IN
V IN
V DET
V TIME GATE
SW
COMP/H
IN
COMP/H
DET
MM1228XFBE (IC103)
SW
BIAS
CLAMP
CLAMP
6dB
CLAMP
IN1
1
SW1
2
IN2
3
SW2
4
GND
8
OUT
7
V
CC
6
IN3
5
SW
H
H
L
L
SN74LV4053APWR (IC202)
1
2
3
4
5
6
7
8
9
15
10
11
12
13
14
16
V
CC
Y-COM
X-COM
1X
0X
A
B
C
1Y
0Y
1Z
Z-COM
0Z
INH
V
EE
GND
TDA7309D013TR (IC301)
17
IN1L
18
IN2L
20
IN3L
14
IN1R
13
IN2R
11
16
IN3R
VS
7
AGND
1
RECOUTL
19
LOUDL
15
CREF
10
RECOUTR
12
9
LOUDR
OUTR
3
CSM
8
ADDR
5
SCL
4
SDA
6
DGND
2
OUTL
LOUDNESS
LOUDNESS
MUTE
INPUT
SELECTOR
SUPPLY
MUTE
SERIAL BUS D LATCHES
SOFT
MUTE
16
2
INN
12
VDD
GAIN
ADJUST
15
AGND
1
INP
3
SHUTDOWN
5
GAIN1
4
GAIN0
14
2
COSC
13
ROSC
BYPASS
SD
GAIN
GAIN
ADJUST
DEGLITCH
LOGIC
DEGLITCH
LOGIC
OC
DETECT
BIASES
AND
REFERENCES
RAMP
GENERATOR
START-UP
PROTECTION
LOGIC
-
+ -
+
-
+
+
-
-
+
+
-
GATE
DRIVE
11 PVDD
10 OUTN
9
GNDN
GATE
DRIVE
6
PVDD
7
OUTP
8
GNDP
VDD OK
THERMAL
16
TPA2000D1PW (IC303)
Summary of Contents for Cineza VPL-HS2
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