Sony BVP-550, Maintenance Manual

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6-7
IC
BVP-550
CXA1486Q (SONY) CXD1171M(SONY)FLAT PACKAGE
25
26
27
28
29
30
31
32
1 2 3 4 5 6 7 8
24 23 22 21 20 19 18 17
16
15
14
13
12
11
10
9
24
12
26
14
2
27
30
18
16
19
20
21
32
4
9
1
10
BLACK1
BLKG
G CTRL
ZERO
W SHAD
F COMP
BLACK2
SIG IN
BLK SHAD
GS2
GS1
CLP PLS1
CLP PLS2
FB REF
KNEE PT
OUT SW
KNEE SW
FLT DET
LPF C2
11
29
7
SIG OUT
PIN
No.
I/O SIGNAL SIGNAL I/O
No.
PIN
V , V I, DR V , = (-2.5 to -5.5V)
EE EE EE
CC CC CC
V , V I, DR V , = (+5V)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I
I
–
I
–
–
O
–
I
I
O
I
–
I
–
I
–
I
I
I
I
–
O
I
O
I
I
–
O
I
O
I
OUT SW
W SHAD
GND I
FB REF
SIG OUT
KNEE PT
KNEE SW
FLR DET
BLKG
GND2
ZERO
BLK SHAD
GND1
SIG IN
GS2
GS1
CLP PLS1
LPF C1
BLACK1
CLP C2
G CTRL
F COMP
LPF C2
BLACK2
CLP C1
CLP PLS2
EE
V I
DR V
EE
DR V
CC
V
CC
V
EE
V I
CC
INPUT
BLACK1, 2
BLKG
BLK SHAD
CLP PLS1, 2
F COMP
FB REF
G CTRL
GS1, 2
KNEE PT
KNEE SW
OUT SW
SIG IN
W SHAD
ZERO
; FOR CLAMP DC COMPENSATION
; BLANKING SIGNAL
; BLACK SHADING CORRECTION SIGNAL
; CLAMP PULSE
; FLARE COMPENSATION SIGNAL
; OUTPUT 2 INVERT AMPLIFY DC ADJUST
; WHITE BALANCE GAIN CONTROL
; GAIN SELECT
; KNEE POINT
; 1/4, 1/5 KNEE SELECT
(4.5V=1/4 KNEE, 0V=1/5 KNEE)
; OUTPUT 3 AMPLIFY SELECT
; SIGNAL INPUT
; WHITE SHADING SIGNAL
; VARIABLE GAIN AMPLIFY ZERO POINT ADJUST
OUTPUT
CLP C1, C2
FLR DET
LPF C1, C2
SIG OUT
; FOR CLAMP CAPACITANCE
; FLARE DETECT
; CONNECT CAPACITANCE FOR LPF
; SIGNAL OUTPUT
VIDEO AMPLIFIER FOR VIDEO CAMERA
- TOP VIEW -
23
LPFC1
31
CLP C1
GND I V I
EE
EE
DR V DR V
CC
GND2
GND1
V
V I
CC
EE
CC
V
FLR DET
11
25
CLP C2
19, 20
21
24
23
G
CLP C1
SIG IN
BLK SHAD
12
26
14
2
FLR DET
27
LPF C2 25
32
30
KNEE PT
KNEE SW
4dB
0dB
2dB
4
1
DR V
SIG OUT
DR V
GS1,2
CLP PLS1
BLACK1
LPF C1
BLKG
G CTRL
ZERO
W SHAD
F COMP
CLP C2
CLP PLS2
BLACK2
FB REF
OUT SW
1/5 KNEE
1/4 KNEE
BLKG
WBAL
DR
9
10
8
7
6
31
18
16
11
29
DD
EE
0dB
C-MOS 8-BIT D/A CONVERTER
— TOP VIEW —
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
D0
IN
D1
IN
D2
IN
D3
IN
D4
IN
D5
IN
D6
IN
D7
IN
BLK
IN
VB
IN
CK
IN
D. V
DD
(+5 V)
IO
OUT
IO
OUT
VG
OUT
VREF
IN
IREF
IN
D. GND
1
2
3
D2
20
21
IO
IO
7
D6
11
VB
D1
4
D3
5
D4
6
D5
15
IREF
CK
BLK
D0 - 7
IO
IO
IREF
VB, VG
VREF ; CLOCK INPUT
; BLANKING PULSE INPUT
; DIGITAL DATA INPUT
; CURRENT OUTPUT
; INVERT CURRENT OUTPUT
; CURRENT REFERENCE INPUT
; FOR CAPACITOR
; VOLTAGE REFERENCE INPUT
20
IO
1
D0
+
3 - 5
–
LATCHES
B. GND
A. GND
D. V
DD
(+5 V)
A. V
DD
(+5 V)
A. V
DD
(+5 V)
A. V
DD
(+5 V)
16
VREF
8
D7
12
9
BLK
D0
17
VG
2 2
9
BLK
2
D2
D4
–
3
DECODER
6 - 8
D5
D7
–
3
DECODER
D1
16
VREF
15
IREF
2
6MSB'S
CURRENT
CELLS
CURRENT
CELLS
FOR FULL
SCALE
2LSB'S
CURRENT
CELLS
21
IO
17
VG
2
11
VB
12
CK
CLOCK
GENERATOR