Sony BVP-550, Maintenance Manual

Page: 605 / 924

6-23
IC
BVP-550
TC74HC595AF(TOSHIBA)FLAT PACKAGE TC74VHC138FS(EL)(TOSHIBA)FLAT PACKAGE(SMALL)
TC74VHC163F(TOSHIBA)FLAT PACKAGE
TC74VHC02F(TOSHIBA)FLAT PACKAGE
C-MOS QUAD 2-INPUT NOR GATES
—TOP VIEW—
A
B
A
B
= Y Y
14 13
V
DD
GND
12 11 10 9 8
7 6 5 4 3 2 1
A
0
0
1
1
B
0
1
0
1
TYPE
HC
AC/VHC
HCT/ACT
V
DD
+2 to +6V
+2 to +5.5V
+5V
Y
1
0
0
0
0 ; LOW LEVEL
1 ; HIGH LEVEL
NOTE:
Y = A + B = A • B
C-MOS 8-BIT SERIAL-INPUT/SERIAL- OR PARALLEL-OUTPUT
SHIFT REGISTER WITH LATCHED 3-STATE OUTPUT
—TOP VIEW—
V
DD
(+2V to +6V)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
1
2
3
4
5
6
7
QB
QC
QD
QE
QF
QG
QH
QA
SI
OE
LCK ( )
SQH
SCK ( )
SI
RESET
SCK
LCK
OE
RESET
8
10
11
12
13
14
15
16
9
OE
LCK
SCK
RESET
SI
QA-QH
SQH OUTPUT ENABLE INPUT
LATCH CLOCK INPUT
SHIFT CLOCK INPUT
SHIFT-REGISTER RESET INPUT
SERIAL IN
PARALLEL OUTPUT
SERIAL OUT ;
;
;
;
;
;
;
RESET
SI
SCK
R
D
D Q
10
14
11
GND
OUT
11
10
14
9
13
15
1
2
3
4
5
6
7
QA
QB
QC
QD
QE
QF
QG
QH
SQH
IN
IN
IN
IN
IN
OUT
12
R
D
D Q
D Q D Q
R
D
D Q
OE
QA
QH
SQH
13
15 7
9
LCK
12
C-MOS 3-TO-8 LINE DECODER / DEMULTIPLEXER
—TOP VIEW—
EN
0
1
1
1
1
1
1
1
1
Y7
1
1
1
1
1
1
1
1
0
Y6
1
1
1
1
1
1
1
0
1
Y5
1
1
1
1
1
1
0
1
1
Y4
1
1
1
1
1
0
1
1
1
Y3
1
1
1
1
0
1
1
1
1
Y2
1
1
1
0
1
1
1
1
1
Y1
1
1
0
1
1
1
1
1
1
Y0
1
0
1
1
1
1
1
1
1
C
X
0
0
0
0
1
1
1
1
B
X
0
0
1
1
0
0
1
1
A
X
0
1
0
1
0
1
0
1
V
DD IN
IN
IN
IN
IN
IN
OUT
INPUTS OUTPUTS
1
2
3
4
5
6
7
A
B
C
EN1
EN2
EN3
Y7
8
10
11
12
13
14
15
16
9
0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE EN = EN1 • EN2 • EN3
GND
OUT
4
1
2
3
15
14
13
A
B
C
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
EN
5
6
EN1
EN2
EN3
Y0
OUT
Y1
OUT Y2
OUT
Y3
OUT Y4
OUT
Y5
OUT Y6
12
11
10
9
7
TYPE
74HCT138 TYPE
74ACT138 TYPE
TC74AC138 TYPE
TC74VHC138
OTHER TYPES
+2 to +5.5V
NOTE:
+2 to +6V
V
DD
+5V
+4.5 to +5.5V
C-MOS PRESETTABLE SYNCHRONOUS 4-BIT BINARY COUNTER
—TOP VIEW—
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
QD
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
QC
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
QB
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
QA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
V
DD
IN
IN
IN
IN
IN
IN
IN
COUNT
OUTPUTS
1
2
3
4
5
6
7
RD
CK
A(DATA A)
B(DATA B)
C(DATA C)
D(DATA D)
EN1
8
10
11
12
13
14
15
16
9
COUNT SEQUENCE
CARRY OUTPUT "CO"
CO IS HIGH WHEN EN2 INPUT IS
HIGH AND COUNT IS "15".
GND
OUT
3
4
5
11
14
13
A
B
C
6
D
2
7
10
QA
LD
RD
9
QB
QC
QD
CO
EN1
EN2
EN2
QD
QC
QB
QA
CO
CO
OUT
QA
OUT QB
OUT
QC
OUT QD
IN
EN2
IN LD
1
12
15
TYPE
HC
AC/VHC
HCT/ACT/FCT
NOTE:
V
DD
+2 to +6V
+5V
+2 to +5.5V
RD
0
1
RESET
(SYNCHRONOUS)
PRESET
(SYNCHRONOUS)
NO COUNT
NO COUNT
COUNT
LD
X
0
EN1
X
X
EN2
X
X
1 1 0 X
1 1 X 0
1 1 1 1
MODE
MODE SELECTION
CONTROL INPUTS