Sony BVP-550, Maintenance Manual

Page: 602 / 924

6-20
IC
BVP-550
SN74HCT244APW-E05(TI)FLAT PACKAGE
TC74VHC244FS(EL)(TOSHIBA)FLAT PACKAGE(SMALL) STK10C68-5S35(SIMTEK)FLAT PACKAGE
TA75S393F(TOSHIBA)
SINGLE COMPARATOR
— TOP VIEW —
V
CC
1 3
OUT
2
5 4
IN (+) IN (–)
V
EE
–
+
V
CC
; +1 V to +18 V or +2 V to +36 V
V
EE
; –1 V to –18 V
G
0
0
X
A
0
1
X
Y
0
1
HI-Z
0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE
HI-Z ; HIGH IMPEDANCE
16 17 18 19 20
G2
G1
G1
15
V
DD
GND
14 13 12 11
A Y = Y A
G G
7 6 5 4 3 2 1
2
4
6
8
11
13
15
17
8 9 10
TYPE
AC
HC
40H
ACT
BCT
FCT
HCT
TC74AC244 TYPE
TC74VHC244
V
DD
NOTE:
+2 to +6V
C-MOS BUS BUFFER WITH 3-STATE OUTPUTS
—TOP VIEW—
+5V
18
16
14
12
9
7
5
3
1 19
G2
G
OR
2
4
6
8
18
16
14
12
1
11
13
15
17
9
7
5
3
19
G
+2 to +5.5V
DUAL DIFFERENTIAL LINE DRIVE
— TOP VIEW —
1Z
1Y
1A
1
2
3
4
8
7
6
5
2Z
2Y
2A GND
V
CC
(+5 V)
C-MOS 8K
×
8-BIT NONVOLATILE STATIC RAM
— TOP VIEW —
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NE
IN
A12
IN
A7
IN
A6
IN
A5
IN
A4
IN
A3
IN
A2
IN
A1
IN
A0 IN
D0
IN/OUT
D1
IN/OUT
D2
IN/OUT
WE
IN
A8
IN
A9
IN
A11
IN
OE
IN
A10
IN
CE
IN
D7 IN/OUT
D6
IN
D5
IN
D4
IN
D3
IN
11
12
13
15
16
17
18
19
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
10
9
8
7
6
5
4
3
25
24
21
23
2
A0 - A12
CE
D0 - D7
NE
OE
WE
; ADDRESS INPUTS
; CHIP ENABLE INPUT
; DATA INPUTS/OUTPUTS
; NONVOLATILE ENABLE INPUT
; OUTPUT ENABLE INPUT
; WRITE ENABLE INPUT
V
DD
(+5V)
GND
NC
1
NE
27
WE
22
OE
20
CE
ROW
DECODER
STATIC RAM
ARRAY
256
×
256
EEPROM ARRAY
256
×
256
COLUMN
DECODER
COLUMN
I/O
A3
7
A4
6
A5
5
A6
4
A7
3
A8
25
A9
24
A12
2
STORE
RECALL
A0
10
A1
9
A2
8
A10
21
A11
23
OE
22
WE
27
NE
1
CE
20
8
8 8
8
8
D0
11
D1
12
D2
13
D3
15
D4
16
D5
17
D6
18
D7
19
INPUT
BUFFER
STORE/RECALL
CONTROL
SN75158PS(TI)