SN32F760 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 129
Version 2.0
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REAL-TIME CLOCK (RTC)
11.1 OVERVIEW
The RTC is an independent timer. The RTC provides a set of continuously running counters which can be used to
provide a clock-calendar function with suitable software.
The counter values can be written to set the current time/date of the system.
11.2 FEATURES
Programmable prescale value: division factor up to 2
20
32-bit programmable counter for long-term measurement
The RTC clock source could be any of the following:
– EHS XTAL clock divided by 128
– ELS X’TA
– ILRC
Reset sources of the RTC Core (Prescale value, Alarm, Counter and Divider):
– “Cold” boot
– DPDWAKEUP
Three dedicated enabled interrupt lines:
–
Alarm interrupt: generating a software programmable alarm interrupt.
– Seconds interrupt: generating a periodic interrupt signal with a programmable period length (up to 1 second).
–Overflow interrupt: to detect when the internal programmable counter rolls over to zero.
11.3 FUNCTIONAL DESCRIPTION
11.3.1 INTRODUCTION
RTC core includes a 20-bit preload value (RTC SECCNTV). Every TR_CLK period, the RTC generates an interrupt
(Second Interrupt) if it is enabled in
register. The second block is a 32-bit programmable counter that can be
initialized to the current system time. The system time is incremented at the TR_CLK rate and compared with a
programmable date (stored in the RTC_ALR register) in order to generate an alarm interrupt, if enabled in
register.
11.3.2 RESET RTC REGISTERS
The RTC_SECCNTV, RTC_ALMCNTV, RTC_SECCNT, and RTC_ALMCNT registers are reset by “cold” boot or
DPDWAKEUP reset.
11.3.3 RTC FLAG ASSERTION
The RTC Second interrupt flag (SECIF) is asserted on each RTC Core clock cycle before the update of the RTC
Counter.
The RTC Overflow interrupt flag (OVFIF) is asserted on the last RTC Core clock cycle before the counter reaches 0x0.
The RTC Alarm interrupt flag (ALMIF) are asserted on the last RTC Core clock cycle before the counter reaches the
RTC Alarm counter reload value stored in the Alarm register.