SN32F260 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 116
Version 1.5
10.9.16 USB Read/Write Data Register (USB_RWDATA)
Address Offset: 0x7C
Reset value: 0x0000 0000
Bit
Name
Description
Attribute Reset
31:0
RWDATA[31:0]
Data to be read or written from/to USB FIFO.
R/W
0
10.9.17 USB Read/Write Status Register (USB_RWSTATUS)
Address Offset: 0x80
Reset value: 0x0000 0000
Bit
Name
Description
Attribute Reset
31:2
Reserved
R
0
1
R_STATUS
Read status of USB FIFO.
*If F/W is to read the data from USB FIFO, set
this bit as ‘1 ’.
When hardware has completed the read action (RWDATA
content has been written by the new data read from USB
FIFO with address RWADDR.) ,this bit is automatically
cleared as ‘0’ by hardware.
R/W
0
0
W_STATUS
Write status of USB FIFO.
*If
F/W is to write data into USB FIFO, set this bit as ‘1 ’.
When hardware has completed the write action (RWDATA
content has been read as the new data, and the new data is
written into USB FIFO with address RWADDR.), this bit is
automatically cleared as ‘0’ by hardware.
R/W
0
10.9.18 USB Read/Write Address Register2 (USB_RWADDR2)
Address Offset: 0x84
Reset value: 0x0000 0000
Bit
Name
Description
Attribute Reset
31:8
Reserved
R
0
7:2
RWADDR[5:0]
USB FIFO address to be read or written from/to USB FIFO.
R/W
0
1:0
Reserved
R
0
10.9.19 USB Read/Write Data Register2 (USB_RWDATA2)
Address Offset: 0x88
Reset value: 0x0000 0000
Bit
Name
Description
Attribute Reset
31:8
RWDATA[31:0]
Data to be read or written from/to USB FIFO.
R/W
0
