Chapter 4 BIOS Setup
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* Bank Interleave
The choices: Disabled; 2 Bank; 4 Bank.
* DRAM Command
Rate
The choices: Disabled; 2 Bank; 4 Bank.
* DRAM CAS Latency
When synchronous DRAM is installed, the number
of clock cycles of CAS latency depends on the
DRAM timing. Do not reset this field from the
default value specified by the system designer.
* DRAM Burst Length
This setting allows you to set the size of Burst-Length
for DRAM. Bursting feature is a technique that DRAM
itself predicts the address of the next memory
location to be accessed after the first address is
accessed. To use the feature, you need to define
the burst length, which is the actual length of burst
plus the starting address and allows internal address
counter to properly generate the next memory
location. The bigger the size, the faster the DRAM
performance.
The choices: 4 QW, 8 QW.
* DRAM Queue Depth
The choices: 1 level; 2 level; 3 level; 4 level.
* System Performance
The choices: Normal; Fast; Faster; Fastest.
* DDSkew Level
The choices: 00-0C.