65KV
30
Choose Enabled or Disabled (default). In order to improve
performance, certain space in memory can be reserved for
ISA cards. This memory must be mapped into the
memory’s space below 16MB.
Memory Hole
You can select CAS latency time in HCLKs of 2/2 or 3/3.
The system board designer should have set the values in
this field, depending on the DRAM installed. Do not
change the values in this field unless you change
specifications of the installed DRAM or the installed CPU.
SDRAM Cycle Length
DRAM optimization feature: If a memory read is ad-
dressed to a location whose latest write is being held in a
buffer before being written to memory, the read is satisfied
through the buffer contents, and the read is not sent to the
DRAM.
The choice:
Enabled,
Disabled
Read Around Write
When disabled, CPU bus will be occupied during th entire
PCI operation period.
The choice:
Enabled,
Disabled
Fast R / W Turn Around
Choose Enabled or Disabled (default). When enabled, the
access to the VGA RAM addressed is cached.
Video RAM Cacheable
Choose Enabled or Disabled (default). When Enabled, the
access to the system BIOS ROM addressed at F0000H-
FFFFFH is cached.
System BIOS
This item allows you to select the value in this field,
depending on whether the board has paged DRAMs or
EDO (extended data output) DRAMs.
The choice:
EDO 50ns,
EDO 60ns,
Slow,
Medium,
Fast,
Turbo
Bank 0/1 2/3 4/5 DRAM