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SMSC USB2640/USB2641

Revision 2.0 (10-03-08) 

DATASHEET

PRODUCT FEATURES

Datasheet

USB2640/USB2641 

Ultra Fast USB 2.0 Multi-Format 

Flash Media Controller/USB 

Hub Combo

General Description

The SMSC USB2640/USB2641 is a USB 2.0 compliant, Hi-

Speed hub for USB port expansion with an attached mass

storage class peripheral controller. The controller allows

read/write capability to popular flash media formats from the

following families:

„

xD-Picture Card

TM

 (xD)

1

 

„

Memory Stick

TM

 (MS)

„

Secure Digital

TM

 (SD)

„

MultiMediaCard

TM

 (MMC) 

The USB2640/USB2641 is a fully integrated, single chip

solution providing USB expansion and integrated flash card

media reader/writer capability of ultra high performance

operation. Average sustained transfer rates exceeding 35 MB/s

are possible if the media and host can support those rates.

Highlights

„

48-pin QFN package

„

Hub controller with internally connected ultra fast flash 

media reader/writer and 2 exposed downstream ports for 
external peripheral expansion

„

Flash media reader/writer employs multiplexed card 

interfaces which are optimized for use with single card 
insertion combo sockets 

„

Hardware-controlled data flow architecture for all self-

mapped media

„

Optional support for external firmware access via SPI 

interface

1.xD-Picture Card not applicable to USB2641.

Features

„

Single chip flash media controller 

„

Transaction translator (TT) in the hub supports operation of 

FS and LS peripherals

„

Over 30 port configuration options

„

Customizable vendor ID, product ID, language ID

„

On board 24 MHz crystal driver circuit

„

Optional external 24 MHz clock input

„

GPIO configuration and polarity: Up to 8 GPIOs for special 

function use

„

Internal card power FET

„

8051 8-bit microprocessor

„

Internal regulator for 1.8V core operation

„

Optimized pinout improves signal flow, easing 

implementation and allowing for improved signal integrity 

treatment

„

Optimized for low latency interrupt handling

„

Hub and flash media reader/writer configuration from a 

single source: External I

2

C ROM or external SPI ROM

„

EEPROM update via USB

„

Please see the USB2640/USB2641 Software Release Notes 

for additional software features

Applications

„

Printers

„

Desktop and Mobile PCs

„

Consumer A/V

„

Media Players/Viewers

„

Vista ReadyBoost

Summary of Contents for USB2640

Page 1: ...employs multiplexed card interfaces which are optimized for use with single card insertion combo sockets Hardware controlled data flow architecture for all self mapped media Optional support for exte...

Page 2: ...to deviate from published specifications Anomaly sheets are available upon request SMSC products are not designed intended authorized or warranted for use in any life support or other application whe...

Page 3: ...guration Options 27 7 1 Hub 27 7 1 1 Hub Configuration Options 27 7 1 2 VBus Detect 27 7 2 Card Reader 27 7 3 System Configurations 27 7 3 1 EEPROM SPI Interface 27 7 3 2 EEPROM Data Descriptor 28 7 3...

Page 4: ...Ultra Fast USB 2 0 Multi Format Flash Media Controller USB Hub Combo Revision 2 0 10 03 08 4 SMSC USB2640 USB2641 DATASHEET Chapter 12 GPIO Usage 60...

Page 5: ...Table 7 1 Internal Flash Media Controller Configurations 28 Table 7 2 Hub Controller Configurations 29 Table 7 3 Other Internal Configurations 30 Table 7 4 FET Configuration 33 Table 7 5 Port Remap R...

Page 6: ...rol with USB Power Switch 24 Figure 6 2 Port Power Control with Single Poly Fuse and Multiple Loads 25 Figure 6 3 Port Power with Ganged Control with Poly Fuse 25 Figure 6 4 USB2640 USB2641 SPI ROM Co...

Page 7: ...to the hub This includes all series termination resistors on D and D pins and all required pull down and pull up resistors on D and D pins The over current sense inputs for the downstream facing ports...

Page 8: ...1 4 8 bit MMC 4 2 SDIO and MMC streaming mode support On board 24 MHz crystal driver circuit Optional external 24 MHz clock input Must be used with an external resistor divider to provide a 1 8V sign...

Page 9: ...wer Bus or self powered selection Hub port disable or non removable configurations Port signal swapping for easier board layout Flexible port mapping and disable sequence Ports can be disabled reorder...

Page 10: ...er agreement with any customer or otherwise with respect to infringement including without limitation any obligations to defend or settle claims to reimburse for costs or to pay damages shall not appl...

Page 11: ...48 VDDA33 47 VDD18PLL 46 USB 42 VDDA33 1 USBDN_DM2 2 USBDN_DP2 3 USBDN_DM3 4 USBDN_DP3 5 PRTCTL2 6 PRTCTL3 7 SPI_CE_N 8 SPI_CLK GPIO4 SCL 9 VDD33 10 SPI_DI 11 SPI_DO GPIO5 SDA SPI_SPD_SEL 12 21 xD_nW...

Page 12: ...43 XTAL2 44 XTAL1 CLKIN 45 RBIAS 48 VDDA33 47 VDD18PLL 46 USB 42 VDDA33 1 USBDN_DM2 2 USBDN_DP2 3 USBDN_DM3 4 USBDN_DP3 5 PRTCTL2 6 PRTCTL3 7 SPI_CE_N 8 SPI_CLK GPIO4 SCL 9 VDD33 10 SPI_DI 11 SPI_DO G...

Page 13: ...MS_BS xD_ALE SD_D5 MS_D1 xD_CLE SD_CMD MS_D0 xD_D7 SD_D4 MS_D2 xD_D6 SD_D3 MS_D3 xD_D5 SD_D2 xD_nRE xD_nWE xD_D4 GPIO6 SD_WP MS_SCLK xD_nB R xD_nCE GPIO12 MS_INS GPIO14 xD_nCD GPIO15 SD_nCD USB INTERF...

Page 14: ...1 SD_CMD MS_D0 SD_D4 MS_D2 SD_D3 MS_D3 SD_D2 GPIO12 MS_INS GPIO14 GPIO6 SD_WP MS_SCLK GPIO15 SD_nCD USB INTERFACE 9 PINS USB USB XTAL1 CLKIN XTAL2 RBIAS 3 VDDA33 VDD18PLL 2 PORT USB INTERFACE 7 PINS U...

Page 15: ...Port Controller PHY Port 3 OC Sense Switch Driver Bus Power Detect V BUS Pulse 1 8V Transaction Translator 1 8V Reg PHY Port 2 OC Sense Switch Driver USB Data Downstream OC Sense Pwr Switch 8051 PROC...

Page 16: ...oller PHY Port 3 OC Sense Switch Driver Bus Power Detect V BUS Pulse 1 8V Transaction Translator 1 8V Reg PHY Port 2 OC Sense Switch Driver USB Data Downstream OC Sense Pwr Switch 8051 PROCESSOR SFR R...

Page 17: ...IN QFN BUFFER TYPE DESCRIPTION xD INTERFACE APPLIES ONLY TO USB2640 xD Write Protect xD_nWP 21 O12PD This pin is an active low write protect signal for the xD device This pin has a weak pull down resi...

Page 18: ...low chip enable signal for the xD device When using the internal FET this pin has an internal weak pull up resistor that is tied to the output of the internal Power FET and is controlled by the xD_PU...

Page 19: ...lock signal to SD MMC device The clock frequency is software configurable SD Command SD_CMD 24 I O12PU This is a bi directional signal that connects to the CMD signal of the SD MMC device The bi direc...

Page 20: ...st be used when connecting to 5V USB power USB Transceiver Bias RBIAS 47 I R A 12 0 k 1 0 resistor is attached from VSSA to this pin in order to set the transceiver s internal bias currents Crystal In...

Page 21: ...this pin becomes GPIO5 GPIO This pin may be used either as input edge sensitive interrupt input or output SDA This pin is the data pin when the device is connected to the optional I2 C EEPROM SPI_SPD...

Page 22: ...hese pins may be used either as input edge sensitive interrupt input or output It is a requirement that this is the only FET used to power xD devices Failure to do this will violate xD voltage specifi...

Page 23: ...d 100 200 mA source only when the FET is enabled I O12PD Input output buffer with 12 mA sink and 12 mA source with an internal weak pull down resistor I O12PU Open drain 12 mA sink with pull up Input...

Page 24: ...ll be disabled at that time When port power is enabled the output driver is disabled and the pull up resistor is enabled creating an open drain output If there is an over current situation the USB Pow...

Page 25: ...t the pull up resistor is providing 3 3V to the anode of the diode If there is an over current situation the poly fuse will open This will cause the cathode of the diode to go to 0V The anode of the d...

Page 26: ...the USB2640 USB2641 must be 1 Mbit and support either 30 MHz or 60 MHz The frequency used is set using the SPI_SPD_SEL For 30 MHz operation this pin must be pulled to ground through a 100 k resistor...

Page 27: ...ontrollers 7 1 2 VBus Detect According to Section 7 2 1 of the USB 2 0 Specification a downstream port can never provide power to its D or D pull up resistors unless the upstream port s VBUS is in the...

Page 28: ...Language Identifier 0409 22h 5Dh USB_MFR_STR USB Manufacturer String Generic Unicode 5Eh 99h USB_PRD_STR USB Product String Ultra Fast Media Reader Unicode 9Ah USB_BM_ATT USB BmAttribute 80h 9Bh USB_...

Page 29: ...E1h PID_MSB Product ID Most Significant Byte 26h E2h DID_LSB Device ID Least Significant Byte 00h E3h DID_MSB Device ID Most Significant Byte 00h E4h CFG_DAT_BYT1 Configuration Data Byte 1 8Bh E5h CF...

Page 30: ...A Reserved 00h F7 FBh N A Reserved 00h FCh FFh NVSTORE_SIG Non volatile storage signature ATA2 ATA2 BYTE NUMBER BYTE NAME DESCRIPTION 25 0 USB_SER_NUM Default Value is UNICODE 0000002640001 Maximum st...

Page 31: ...IPTION 7 0 USB_BM_ATT Self or Bus Power Selects between Self and Bus Powered operation The hub is either Self Powered draws less than 2 mA of upstream bus power or Bus Powered limited to a 100 mA maxi...

Page 32: ...SD Card Write Protect Sense 1 default SD cards will be write protected when SW_nWP is high and writable when SW_nWP is low 0 SD cards will be write protected when SW_nWP is low and writable when SW_nW...

Page 33: ...strings corresponding to LUN 0 1 2 and 3 Number of Icons to Display SM LUN MS LUN SD MMC LUN The SM value will be overridden with xD once an xD Picture Card has been identified Table 7 4 FET Configur...

Page 34: ...mapping bytes in applications where the OEM wishes to reorder and rename the LUNs or utilizes a combo socket and wishes to rename the LUN BYTE NUMBER BYTE NAME STRING DESCRIPTION 6 0 LUN2_ID_STR SM T...

Page 35: ...e program assumes that you are using the default value of 04 and will display icons for xD MS and SD MMC If this field is any other value besides FF you must specify the LUN assignments in the boxes s...

Page 36: ...Ah For internal use only BIT NUMBER BYTE NAME DESCRIPTION 7 0 VID_LSB Least Significant Byte of the Vendor ID This is a 16 bit value that uniquely identifies the Vendor of the user device assigned by...

Page 37: ...R Self or Bus Power Selects between Self and Bus Powered operation The hub is either Self Powered draws less than 2 mA of upstream bus power or Bus Powered limited to a 100 mA maximum of upstream powe...

Page 38: ...ely used feature in the PC environment existing drivers may not have been thoroughly debugged with this feature enabled It is included because it is a permitted feature in Chapter 11 of the USB specif...

Page 39: ...NUMBER BIT NAME DESCRIPTION 7 4 Reserved Always reads 0 3 PRTMAP_EN Port Re mapping enable Selects the method used by the hub to assign port numbers and disable ports 0 Standard Mode Strap options or...

Page 40: ...t 3 1 port 3 non removable Bit 2 1 Port 2 non removable Bit 1 1 Port 1 non removable Bit 0 Reserved always 0 Note Bit 1 must be set to a 1 by the firmware for proper identification of the card reader...

Page 41: ...disabled Bit 2 1 Port 2 is disabled Bit 1 1 Port 1 is disabled Bit 0 is Reserved always 0 BIT NUMBER BYTE NAME DESCRIPTION 7 0 MAX_PWR_SP Max Power Self_Powered Value in 2 mA increments that the hub c...

Page 42: ...ication does not permit this value to exceed 100 mA A value of 50 decimal indicates 100 mA which is the default value BIT NUMBER BYTE NAME DESCRIPTION 7 0 HC_MAX_C_BP Hub Controller Max Current Bus Po...

Page 43: ...MBER BIT NAME DESCRIPTION 7 6 Reserved Always reads 0 5 4 BOOST_IOUT_3 Upstream USB electrical signaling drive strength Boost Bit for Downstream Port 3 00 Normal electrical drive strength No boost 01...

Page 44: ...nd DM Pins for ease of board routing to devices and connectors 0 USB D functionality is associated with the DP pin and D functionality is associated with the DM pin 1 USB D functionality is associated...

Page 45: ...nabled see PRTMAP_EN in Register 08h Configuration Data Byte 3 the hub s downstream port numbers can be remapped to different logical port numbers assigned by the host Note OEM must ensure that Contig...

Page 46: ...the hub is the Physical Port Number When remapping mode is enabled see PRTMAP_EN in Register 08h Configuration Data Byte 3 the hub s downstream port numbers can be remapped to different logical port...

Page 47: ...compatibility Note Extensions to the I2C Specification are not supported The device acts as the master and generates the serial clock SCL controls the bus access determines which device acts as the tr...

Page 48: ...Please refer to Table 7 1 for the internal default values that are loaded when this option is selected 7 5 Reset There are two different resets that the device experiences One is a hardware reset eit...

Page 49: ...all TT buffers 5 Moves device from suspended to active if suspended 6 Complies with Section 11 10 of the USB 2 0 Specification for behavior after completion of the reset sequence The host then config...

Page 50: ...Hardware disables output driver high impedance PU Hardware enables pullup PD Hardware enables pulldown HW Hardware controls function but state is protocol dependent FW Firmware controls function thro...

Page 51: ...PIO 0 14 GPIO15 SD_nCD GPIO Z PU Y 17 xD_D3 SD_D1 MS_D5 none Z 18 xD_D2 SD_D0 MS_D4 none Z 19 xD_D1 SD_D7 MS_D6 none Z 20 xD_D0 SD_D6 MS_D7 none Z 21 xD_nWP SD_CLK MS_BS none Z 22 xD_nWE none Z 23 xD_...

Page 52: ...Pin Reset States RESET STATE PIN PIN NAME FUNCTION OUTPUT PU PD INPUT 1 USBDN_DM2 USBDN_DM2 0 PD 2 USBDN_DP2 USBDN_DP2 0 PD 3 USBDN_DM3 USBDN_DM3 0 PD 4 USBDN_DP3 USBDN_DP3 0 PD 6 PRTCTL2 PRTCTL 0 7 P...

Page 53: ...ne Z 24 SD_CMD MS_D0 none Z 29 GPIO14 GPIO Z pU Y 30 SD_D4 MS_D2 none Z 31 GPIO12 MS_INS GPIO Z pU Y 32 SD_D3 MS_D3 none Z 33 SD_D2 none Z 35 GPIO10 CARD_PWR GPIO Z 36 GPIO2 RXD GPIO 0 37 GPIO1 LED1 T...

Page 54: ...r off In addition voltage transients on the AC power line may appear on the DC output When this possibility exists a clamp circuit should be used Figure 9 1 Supply Rise Time Models PARAMETER SYMBOL MI...

Page 55: ...0 400 s Figure 9 1 1 8V supply rise time tRT 0 400 s Figure 9 1 Voltage on USB and USB pins 0 3 5 5 V If any 3 3V supply voltage drops below 3 0V then the MAX becomes 3 3V supply voltage 0 5 5 5 Volt...

Page 56: ...H 12 mA VDD33 3 3V VIN 0 to VDD33 Note 9 3 I O12 I O12PU I O12PD Type Buffer Low Output Level High Output Level Output Leakage Pull Down Pull Up VOL VOH IOL PD PU VDD33 0 4 10 72 58 0 4 10 V V A A A I...

Page 57: ...p 9 4 Capacitance TA 25 C fc 1 MHz VDD33 3 3V VDD18 1 8V Integrated Power FET Set to 200 mA Output Current Note 9 6 Short Circuit Current Limit On Resistance Note 9 6 Output Voltage Rise Time IOUT ISC...

Page 58: ...scillator Clock Crystal Parallel Resonant Fundamental Mode 24 MHz 100 ppm External Clock 50 Duty cycle 10 24 MHz 100 ppm Jitter 100 ps rms Figure 10 1 Typical Crystal Circuit Note CB equals total boar...

Page 59: ...Ultra Fast USB 2 0 Multi Format Flash Media Controller USB Hub Combo SMSC USB2640 USB2641 59 Revision 2 0 10 03 08 DATASHEET Chapter 11 Package Outline Figure 11 1 USB2640 USB2641 48 Pin QFN...

Page 60: ...IVE LEVEL SYMBOL DESCRIPTION AND NOTE GPIO1 H TxD LED Serial port transmit line LED indicator GPIO2 H RxD Serial port receive line GPIO4 H SCK Serial EEPROM clock GPIO5 H SDA Serial EEPROM data GPIO6...

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