SMART Embedded Computing MVME2502, Installation And User Manual

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Memory Maps and Registers
MVME2502 Installation and Use (6806800R96L) 107
5.5.12 PLD Write Protect and I
2
C Debug Register
The MVME2502 PLD provides an 8-bit register which is used to indicate the status of I
2
C
and SPI write-protect manual switches and is used to control the SPI write-enable. The I
2
C
debug ports are also provided in this register which is used in controlling the bus’ status.
Table 5-15 PLD Write Protect and I
2
C Debug Register
REG PLD Write Protect I2C Debug- 0xFFDF0054
Bit 7 6 5 4 3 2 1 0
Field RSVD
MASTER
_WP_DI
SABLED
FLASH_
WP_N I2C_DEB
UG_EN
SERIAL_
FLASH_
WP
RSVD I2C_1_D I2C_1_C
OPER R R R R/W R/W R R/W R/W
RESET 0 1 0 0 1 0 1 1
Field Description
SPD_WP- SPD write-protection
0 - SPD Writes enabled
1 - SPD Writes disabled
MASTER_WP- MASTER WP Switch (S2-6)
0-Switch S2-6 closed. SPI, SPD, VPD, USER FLASH write
enable
1-Switch S2-6 open, register bits control write protectioN
USER_WP- USER FLASH write-protect
1 - USER I2C FLASH writes disabled
0 - USER I2C FLASH writes enabled
I2C_DEBUG_EN I2C debug ports (I2C_1_D and I2C_1_C) enable
1 - Drive Enabled
0 - Drive Disabled
SERIAL_FLASH_WP SPI devices write-protect register
0 - SPI FLASH writes enabled
1 - SPI FLASH writes disabled
I2C_1_D I2C debug port-Data
0 - Driven Low
1 - HiZ
I2C_1_C I2C debug port-Clock
0 - Driven Low
1 - HiZ